LR38581
3
PIN DESCRIPTION
PIN NO.
SYMBOL
I/O
POLARITY
PIN NAME
DESCRIPTION
1
OBCP
O4MA3
Optical black clamp
pulse output
A pulse to clamp the optical black signal. This pulse stays
low during the absence of effective pixels within the vertical
blanking. The polarity can be changed by PLCH (pin 39).
A pulse to clamp the AD input signal. The polarity can
be changed by PLCH (pin 39).
A pulse that corresponds to the cease period of the
horizontal transfer pulse.
A pulse to sample-hold the signal from CCD.
The polarity can be changed by PLCH (pin 39).
The output phase of FS is selected by serial data.
A pulse to clamp the feed-through level from CCD.
The polarity can be changed by PLCH (pin 39).
The output phase of FCDS is selected by serial data.
A pulse to sample-hold the signal from CDS circuit.
The polarity can be changed by PLCH (pin 39).
The output phase of RS is selected by serial data.
A grounding pin.
Supply of +3.3 V power.
2
CLP
O4MA3
AD input signal
clamp pulse output
Pre-blanking pulse
output
3
PBLK
O4MA3
4
FS
O4MA32
CDS pulse output 1
5
FCDS
O4MA32
CDS pulse output 2
6
RS
O4MA32
S/H pulse output
Ground
Power supply
–
–
GND
V
DD3
7
8
–
–
–
9
ED
0
ICSU3
Shift register clock
input
An input pin for the clock of the shift register, to control
the functions of LR38581. For details, see
"
Serial Data
Control
."
An input pin for the data of the shift register, to control
the functions of LR38581. For details, see
"
Serial Data
Control
."
An input pin for the strobe pulse, to control the functions
of LR38581. For details, see
"
Serial Data Control
."
An input pin to select mirror or normal image mode
L level
: Normal image mode
H level or open
: Mirror image mode
MIR
FH
1B
FH
2B
∏ FH
2
Shift register data
input
ICSU3
ED
1
10
–
–
11
ED
2
ICSU3
Strobe pulse input
Mirror mode
selection
ICU3
MIR
12
–
L (Normal mode)
∏ FH
1
∏ FH
1
∏ FH
2
H or open (Mirror mode)
–
–
–
13
14
15
TST
1
TST
2
V
DD5
ICD5
ICD5
–
Test pin 1
Test pin 2
Power supply
Vertical transfer
pulse output 1
Vertical transfer
pulse output 2
A test pin. Set open or to L level in the normal mode.
A test pin. Set open or to L level in the normal mode.
Supply of +5 V power.
A pulse to drive vertical CCD shift register.
Connect to
V1
pin of CCD.
A pulse to drive vertical CCD shift register.
Connect to
V2
pin of CCD.
16
V
1
O4MA52
A pulse to drive vertical CCD shift register.
Connect to
V3
pin of CCD.
Vertical transfer
pulse output 3
O4MA52
V
3
18
O4MA52
V
2
17