參數(shù)資料
型號(hào): LPC47N217-JN
廠商: SMSC Corporation
英文描述: 64 - PIN SUPUR I/O WITH LPC INTERFACE
中文描述: 64 -針蘇布爾的I / LPC接口?
文件頁(yè)數(shù): 123/228頁(yè)
文件大?。?/td> 1269K
代理商: LPC47N217-JN
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are monitored by using the Fan Tachometer registers. These signals, as well as the Fan Tachometer registers, are
described below (see also section
8
RUNTIME REGISTERS
).
SMSC DS – LPC47M192
Page 123
Rev. 03/30/05
DATASHEET
Fan Tachometer Inputs
A fan tachometer input is used to measure the speed at which a fan is rotating. The fan tachometer input is a train of
square pulses with a 50% duty cycle (see FIGURE 8) that are derived from the magnetic fields generated by the
rotating rotor of the fan. The speed of the fan can be determined by calculating the period of the Fan Tachometer
input pulse.
Note:
All calculations are based on fans that emit 2 square pulses per revolution.
Fan Tachometer Input
Clock Source for Counter
T
P
T
R
= Revolution Time = 60/RPM (sec)
T
= Pulse Time = T
/2
(Two Pulses Per Revolution)
F = 32.786kHz / Divisor
T
R
FIGURE 8
FAN TACHOMETER INPUT AND CLOCK SOURCE
The counter is used to determine the period of the Fan Tachometer input pulse. This counter, if reset on the rising
edge of the fan tachometer input pulse, measures the number of clock pulses generated by the clock source for the
duration of one fan tachometer input pulse. Since two fan tachometer input pulses are generated per revolution of
the fan rotor, the speed of the fan is easily calculated. Everytime the fan tachometer input resets the counter, it also
latches the value of the counter into the Fan Tachometer register. This value is used by the operating system to
monitor the speed of the fan.
Fan Monitoring Logic
The clock source for the counter is the output of the programmable divider whose input is the 32.768kHz oscillator
(see figure below).
The counter is reset by the rising edge of each fan tachometer input pulse, by itself if it reaches its’ maximum count of
0xFF, or by writing to the preload register.
If the fan is functioning, a value is preloaded into the counter on the rising edge of the Fan Tachometer input. The
counter counts the number of clock pulses generated for the duration of one Fan Tachometer input pulse. This value
(
Count
) is then stored into the Fan Tachometer register. If the fan is operating at 70% (or less) of the maximum
capacity, the Count value will be greater than or equal to 192 and thereby generate a PME# signal. To ensure the
Fan Tachometer register has been updated if the fan suddenly seizes, a second PME is generated when the counter
reaches 0xFF and the Fan Tachometer register is latched again. The Fan Tachometer register will remain at this
value until another Fan Tachometer input pulse is received.
A representation of the logic for the fan tachometer implementation is shown below.
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