
4
SMSC DS – LPC47M192
Page 12
Rev. 03/30/05
DATASHEET
DESCRIPTION OF PIN FUNCTIONS
QFP PIN#
NAME
DESCRIPTION
BUFFER
NAME
PWR
WELL
NOTES
POWER PINS (10)
53, 65,93
18
44
7, 31, 60,76
40
VCC
VTR
VREF
VSS
AVSS
+3.3 Volt Supply Voltage
+3.3 Volt Standby Supply Voltage
Reference Voltage
Ground
Analog Ground
1
2
1
CLOCKS (2)
6
19
CLOCKI32
CLOCKI
32.768kHz Trickle Clock Input
14.318MHz Clock Input
PROCESSOR/HOST LPC INTERFACE (10)
Active high LPC I/O used for multiplexed
command, address and data bus.
Active low input indicates start of new cycle
and termination of broken cycle.
Active low output used for encoded
DMA/Bus Master request for the LPC
interface.
Active low input used as LPC Interface
Reset.
Active low input Power Down signal indicates
that the LPC47M192 should prepare for
power to be shut-off on the LPC interface.
PCI clock input.
Serial IRQ pin used with the PCI_CLK pin
to transfer LPC47M192 interrupts to the
host.
FAN CONTROL (4)
General Purpose I/O. GPIO can be
configured as an Open-Drain Output.
/Fan Tachometer 2 Input
IS
IS
VTR
VCC
3
23:20
LAD[3:0]
PCI_IO
VCC
24
LFRAME#
PCI_I
VCC
25
LDRQ#
PCI_O
VCC
26
PCI_RESET#
PCI_I
VCC
27
LPCPD#
PCI_I
VCC
4
29
30
PCI_CLK
SER_IRQ
PCI_ICLK
PCI_IO
VCC
VCC
51
GP30/
FAN_TACH2
GP31/
FAN_TACH1
GP32/
FAN2
IO8
VCC
5
52
General Purpose I/O. GPIO can be
configured as an Open-Drain Output.
/Fan Tachometer 1 Input
IO8
VCC
5
54
General Purpose I/O
/Fan Speed Control 2 Output
Both functions can be configured as Open-
Drain Output.
General Purpose I/O
/Fan Speed Control 1 Output
Both functions can be configured as Open-
Drain Output.
FDD INTERFACE (14)
Raw serial bit stream from the disk drive, low
active. Each falling edge represents a flux
transition of the encoded data.
Write Gate Output. This active low high
current driver allows current to flow through
the write head. It becomes active just prior
to writing to the diskette. Can be configured
as an Open-Drain Output.
IO12
VCC
5, 6
55
GP33/
FAN1
IO12
VCC
5, 6
16
nRDATA
IS
VCC
11
nWGATE
O12
VCC