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參數資料
| 型號： | LPC2478FET208 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數學處理器 |
| 英文描述： | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2478FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2478FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht |
| 文件頁數： | 33/93頁 |
| 文件大?。?/td> | 751K |
| 代理商： | LPC2478FET208 |
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LPC2478
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 12 September 2011
33 of 93
NXP Semiconductors
LPC2478
Single-chip 16-bit/32-bit microcontroller
–
Asynchronous page mode read
–
Programmable Wait States
–
Bus turnaround delay
–
Output enable and write enable delays
–
Extended wait
Four chip selects for synchronous memory and four chip selects for static memory
devices.
Power-saving modes dynamically control CKE and CLKOUT to SDRAMs.
Dynamic memory self-refresh mode controlled by software.
Controller supports 2048 (A0 to A10), 4096 (A0 to A11), and 8192 (A0 to A12) row
address synchronous memory parts. That is typical 512 MB, 256 MB, and 128 MB
parts, with 4, 8, 16, or 32 data bits per device.
Separate reset domains allow auto-refresh through a chip reset if desired.
Note:
Synchronous static memory devices (synchronous burst mode) are not supported.
7.8 General purpose DMA controller
The GPDMA is an AMBA AHB compliant peripheral allowing selected LPC2478
peripherals to have DMA support.
The GPDMA enables peripheral-to-memory, memory-to-peripheral,
peripheral-to-peripheral, and memory-to-memory transactions. Each DMA stream
provides unidirectional serial DMA transfers for a single source and destination. For
example, a bidirectional port requires one stream for transmit and one for receive. The
source and destination areas can each be either a memory region or a peripheral, and
can be accessed through the AHB master.
7.8.1
Features
Two DMA channels. Each channel can support a unidirectional transfer.
The GPDMA can transfer data between the 16 kB SRAM, external memory, and
peripherals such as the SD/MMC, two SSPs, and the I
2
S interface.
Single DMA and burst DMA request signals. Each peripheral connected to the
GPDMA can assert either a burst DMA request or a single DMA request. The DMA
burst size is set by programming the GPDMA.
Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and
peripheral-to-peripheral transfers.
Scatter or gather DMA is supported through the use of linked lists. This means that
the source and destination areas do not have to occupy contiguous areas of memory.
Hardware DMA channel priority. Each DMA channel has a specific hardware priority.
DMA channel 0 has the highest priority and channel 1 has the lowest priority. If
requests from two channels become active at the same time, the channel with the
highest priority is serviced first.
AHB slave DMA programming interface. The GPDMA is programmed by writing to the
DMA control registers over the AHB slave interface.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LPC2478FET208,551 | 功能描述:ARM微控制器 - MCU LCD CONT/ETHNET USB/512K FL RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數據總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數據 RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| LPC2478FET208551 | 制造商:NXP Semiconductors 功能描述:MCU ARM7 208TFBGA |
| LPC2478-STK | 功能描述:開發(fā)板和工具包 - ARM DEV BRD FOR LPC2478 64MB SDRAM 100MBIT RoHS:否 制造商:Arduino 產品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| LPC2478-STK-MICTOR | 功能描述:開發(fā)板和工具包 - ARM DEV BRD FOR LPC2478 RoHS:否 制造商:Arduino 產品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| LPC-24B-12R | 制造商:OPTIFUSE 功能描述: |
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