- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385497 > LPC2460FET208 (NXP Semiconductors N.V.) Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface PDF資料下載
參數(shù)資料
| 型號(hào)： | LPC2460FET208 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2420FBD208<SOT459-1 (LQFP208)|<<http://www.nxp.com/packages/SOT459-1.html<1<Always Pb-free,;LPC2420FET208<SOT950-1 (TFBGA208)|<<http://www.nxp.com/packages/SOT950-1.ht |
| 文件頁數(shù)： | 30/86頁 |
| 文件大小： | 496K |
| 代理商： | LPC2460FET208 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁
LPC2420_60
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6.1 — 22 September 2011
30 of 86
NXP Semiconductors
LPC2420/2460
Flashless 16-bit/32-bit microcontroller
–
Asynchronous page mode read
–
Programmable Wait States
–
Bus turnaround delay
–
Output enable and write enable delays
–
Extended wait
Four chip selects for synchronous memory and four chip selects for static memory
devices.
Power-saving modes dynamically control CKE and CLKOUT to SDRAMs.
Dynamic memory self-refresh mode controlled by software.
Controller supports 2048, 4096, and 8192 row address synchronous memory parts.
That is typical 512 MB, 256 MB, and 128 MB parts, with 4, 8, 16, or 32 data bits per
device.
Separate reset domains allow the for auto-refresh through a chip reset if desired.
Note:
Synchronous static memory devices (synchronous burst mode) are not supported.
7.7 General purpose DMA controller
The GPDMA is an AMBA AHB compliant peripheral allowing selected LPC2420/2460
peripherals to have DMA support.
The GPDMA enables peripheral-to-memory, memory-to-peripheral,
peripheral-to-peripheral, and memory-to-memory transactions. Each DMA stream
provides unidirectional serial DMA transfers for a single source and destination. For
example, a bidirectional port requires one stream for transmit and one for receive. The
source and destination areas can each be either a memory region or a peripheral, and
can be accessed through the AHB master.
7.7.1
Features
Two DMA channels. Each channel can support a unidirectional transfer.
The GPDMA can transfer data between the 16 kB SRAM, external memory, and
peripherals such as the SD/MMC, two SSPs, and the I
2
S interface.
Single DMA and burst DMA request signals. Each peripheral connected to the
GPDMA can assert either a burst DMA request or a single DMA request. The DMA
burst size is set by programming the GPDMA.
Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and
peripheral-to-peripheral transfers.
Scatter or gather DMA is supported through the use of linked lists. This means that
the source and destination areas do not have to occupy contiguous areas of memory.
Hardware DMA channel priority. Each DMA channel has a specific hardware priority.
DMA channel 0 has the highest priority and channel 1 has the lowest priority. If
requests from two channels become active at the same time, the channel with the
highest priority is serviced first.
AHB slave DMA programming interface. The GPDMA is programmed by writing to the
DMA control registers over the AHB slave interface.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2458FET180 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| LPC2468FBD208 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| LPC2468FET208 | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| LPC2470FBD208 | Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
| LPC2470FET208 | Flashless 16-bit-32-bit microcontroller; Ethernet, CAN, LCD, USB 2.0 device-host-OTG, external memory interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2460FET208,551 | 功能描述:ARM微控制器 - MCU ARM7 USBHOST/ENET ROMLESS RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2468 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2468_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2468_11 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit micro; 512 kB flash, Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface |
| LPC2468FBD208 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 USB OTG CAN SMD 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, USB OTG, CAN, SMD 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM7, 72MHZ, LQFP-208; Controller Family/Series:(ARM7); Core Size:32bit; No. of I/O's:160; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:208; Program Memory Size:512KB ;RoHS Compliant: Yes |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。