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參數(shù)資料
| 型號(hào)： | LPC2458FET180 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | Single-chip 16-bit-32-bit micro; 512 kB flash, Ethernet, CAN, ISP-IAP, USB 2.0 device-host-OTG, external memory interface |
| 封裝： | LPC2458FET180<SOT570-3 (TFBGA180)|<<http://www.nxp.com/packages/SOT570-3.html<1<Always Pb-free,; |
| 文件頁(yè)數(shù)： | 43/80頁(yè) |
| 文件大小： | 611K |
| 代理商： | LPC2458FET180 |
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LPC2458
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 1 September 2011
43 of 80
NXP Semiconductors
LPC2458
Single-chip 16-bit/32-bit micro
8. Limiting values
[1]
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
SSIO
/V
SSCORE
unless otherwise noted.
[2]
Including voltage on outputs in 3-state mode.
[3]
Not to exceed 4.6 V.
[4]
The peak current is limited to 25 times the corresponding maximum current.
[5]
The maximum non-operating storage temperature is different than the temperature for required shelf life which should be determined
based on required shelf lifetime. Please refer to the JEDEC spec (J-STD-033B.1) for further details.
[6]
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k
series resistor.
Table 6.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Symbol
Parameter
V
DD(3V3)
supply voltage (3.3 V)
Limiting values
Conditions
core and external
rail
Min
3.0
Max
3.6
Unit
V
V
DD(DCDC)(3V3)
DC-to-DC converter supply voltage
(3.3 V)
V
DDA
analog 3.3 V pad supply voltage
V
i(VBAT)
input voltage on pin VBAT
V
i(VREF)
input voltage on pin VREF
V
IA
analog input voltage
3.0
3.6
V
0.5
0.5
0.5
0.5
+4.6
+4.6
+4.6
+5.1
V
V
V
V
for the RTC
on ADC related
pins
5 V tolerant I/O
pins; only valid
when the V
DD(3V3)
supply voltage is
present
other I/O pins
V
I
input voltage
[2]
0.5
+6.0
V
[2][3]
0.5
V
DD(3V3)
+
0.5
100
100
+150
1.5
V
I
DD
I
SS
T
stg
P
tot(pack)
supply current
ground current
storage temperature
total power dissipation (per package)
per supply pin
per ground pin
non-operating
based on package
heat transfer, not
device power
consumption
human body
model; all pins
[4]
-
mA
mA
C
W
[4]
-
[5]
65
-
V
ESD
electrostatic discharge voltage
[6]
2500
+2500
V
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