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| 型號(hào)： | LPC2364FB100 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| 中文描述： | 單芯片16-bit/32-bit微控制器，高達(dá)512的ISP /國(guó)際檢察官聯(lián)合會(huì)，以太網(wǎng)，USB 2.0，CAN和10 kB閃存位的ADC / DAC |
| 文件頁數(shù)： | 13/48頁 |
| 文件大?。?/td> | 377K |
| 代理商： | LPC2364FB100 |
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LPC2364_66_68_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Preliminary data sheet
Rev. 01 — 22 September 2006
13 of 48
Philips Semiconductors
LPC2364/2366/2368
Fast communication chip
The LPC2364/66/68 implements two AHB buses in order to allow the Ethernet block to
operate without interference caused by other system activity. The primary AHB, referred
to as AHB1, includes the Vectored Interrupt Controller, and General Purpose DMA
Controller.
The second AHB, referred to as AHB2, includes only the Ethernet block and an
associated 16 kB SRAM. In addition, a bus bridge is provided that allows the secondary
AHB to be a bus master on AHB1, allowing expansion of Ethernet buffer space into
off-chip memory or unused space in memory residing on AHB1.
In summary, bus masters with access to AHB1 are the ARM7 itself, the General Purpose
DMA function, and the Ethernet block (via the bus bridge from AHB2). Bus masters with
access to AHB2 are the ARM7 and the Ethernet block.
AHB peripherals are allocated a 2 MB range of addresses at the very top of the 4 GB
ARM memory space. Each AHB peripheral is allocated a 16 kB address space within the
AHB address space. Lower speed peripheral functions are connected to the APB bus.
The AHB to APB bridge interfaces the APB bus to the AHB bus. APB peripherals are also
allocated a 2 MB range of addresses, beginning at the 3.5 GB address point. Each APB
peripheral is allocated a 16 kB address space within the APB address space.
The ARM7TDMI-S processor is a general purpose 32-bit microprocessor, which offers
high performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of microprogrammed Complex
Instruction Set Computers. This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The standard 32-bit ARM set.
A 16-bit Thumb set.
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPC2364 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2366 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2366FB100 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2368 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
| LPC2368FB100 | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, Ethernet, USB 2.0, CAN, and 10-bit ADC/DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LPC2364FBD100 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 10/100 USB CAN 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7, 10/100, USB, CAN 制造商:NXP Semiconductors 功能描述:IC, 32BIT MCU, ARM7, 72MHZ, LQFP-100; Controller Family/Series:(ARM7); Core Size:32bit; No. of I/O's:70; Supply Voltage Min:3V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:100; Program Memory Size:128KB ;RoHS Compliant: Yes 制造商:NXP Semiconductors 功能描述:Microcontroller,LPC2364FBD100 72 MHz |
| LPC2364FBD100,551 | 功能描述:ARM微控制器 - MCU ARM7 128KF/USB/ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2364FBD100551 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 72MHZ LQFP-100 |
| LPC2364FET100 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flashnull |
| LPC2364FET100,518 | 功能描述:ARM微控制器 - MCU 16/32 bit micro RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
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