參數(shù)資料
型號: LPC2292FBD144
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)學處理器
英文描述: 16-32-bit ARM microcontrollers; 256 kB ISP-IAP flash with CAN, 10-bit ADC and external memory interface
封裝: LPC2292FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;LPC2292FET144/01<SOT569-1 (TFBGA144)|<<http://www.nxp.com/packages/SOT56
文件頁數(shù): 32/54頁
文件大?。?/td> 428K
代理商: LPC2292FBD144
LPC2292_2294
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 8 June 2011
32 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
[1]
Typical ratings are not guaranteed. The values listed are at room temperature (+25
C), nominal supply voltages.
[2]
Internal rail.
[3]
External rail.
[4]
Including voltage on outputs in 3-state mode.
[5]
V
DD(3V3)
supply voltages must be present.
3-state outputs go into 3-state mode when V
DD(3V3)
is grounded.
Accounts for 100 mV voltage drop in all supply lines.
[6]
[7]
[8]
Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[9]
Minimum condition for V
I
= 4.5 V, maximum condition for V
I
= 5.5 V.
[10] Applies to P1[25:16].
[11] See the
LPC2119/2129/2194/2292/2294 User Manual
.
[12] To V
SS
.
[1]
Conditions: V
SSA
= 0 V, V
DDA
= 3.3 V.
The ADC is monotonic, there are no missing codes.
[2]
[3]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 5
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 5
.
[4]
[5]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 5
.
[6]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 5
.
[7]
The absolute voltage error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the
non-calibrated ADC and the ideal transfer curve. See
Figure 5
.
Oscillator pins
V
i(XTAL1)
V
o(XTAL2)
input voltage on pin XTAL1
output voltage on pin
XTAL2
0
0
-
-
1.8
1.8
V
V
Table 7.
T
amb
=
40
C to +125
C, unless otherwise specified.
Symbol
Parameter
Static characteristics
…continued
Conditions
Min
Typ
[1]
Max
Unit
Table 8.
V
DDA
= 2.5 V to 3.6 V; T
amb
=
40
C to +125
C unless otherwise specified. ADC frequency 4.5 MHz.
Symbol
Parameter
Conditions
V
IA
analog input voltage
C
ia
analog input
capacitance
E
D
differential linearity
error
E
L(adj)
integral non-linearity
E
O
offset error
E
G
gain error
E
T
absolute error
ADC static characteristics
Min
0
-
Typ
-
-
Max
V
DDA
1
Unit
V
pF
[1][2][3]
-
-
1
LSB
[1][4]
-
-
-
-
-
2
3
0.5
4
LSB
LSB
%
LSB
[1][5]
-
[1][6]
-
[1][7]
-
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