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      參數(shù)資料
      型號: LPC2212FBD144
      廠商: NXP Semiconductors N.V.
      元件分類: 數(shù)學(xué)處理器
      英文描述: Single-chip 16-32-bit ARM microcontrollers; 128-256 kB ISP-IAP flash with 10-bit ADC and external memory interface
      封裝: LPC2212FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486-1.html<1<Always Pb-free,;LPC2214FBD144/01<SOT486-1 (LQFP144)|<<http://www.nxp.com/packages/SOT486
      文件頁數(shù): 38/47頁
      文件大小: 337K
      代理商: LPC2212FBD144
      LPC2212_2214
      All information provided in this document is subject to legal disclaimers.
      NXP B.V. 2011. All rights reserved.
      Product data sheet
      Rev. 5 — 14 June 2011
      38 of 47
      NXP Semiconductors
      LPC2212/2214
      Single-chip 16/32-bit ARM microcontrollers
      Table 10.
      C
      L
      = 25 pF; T
      amb
      = 40
      C.
      Symbol
      Parameter
      Common to read and write cycles
      t
      CHAV
      XCLK HIGH to address valid
      time
      t
      CHCSL
      XCLK HIGH to CS LOW time
      t
      CHCSH
      XCLK HIGH to CS HIGH
      time
      t
      CHANV
      XCLK HIGH to address
      invalid time
      Read cycle parameters
      t
      CSLAV
      CS LOW to address valid
      time
      t
      OELAV
      OE LOW to address valid
      time
      t
      CSLOEL
      CS LOW to OE LOW time
      t
      am
      memory access time
      External memory interface dynamic characteristics
      Conditions
      Min
      Typ Max
      Unit
      -
      -
      10
      ns
      -
      -
      -
      -
      10
      10
      ns
      ns
      -
      -
      10
      ns
      [1]
      5
      -
      +10
      ns
      [1]
      5
      -
      +10
      ns
      5
      -
      -
      +5
      -
      ns
      ns
      [2][3]
      (T
      cy(CCLK)
      (2 + WST1)) +
      (
      20)
      t
      am(ibr)
      memory access time (initial
      burst-ROM)
      memory access time
      (subsequent burst-ROM)
      data input hold time
      CS HIGH to OE HIGH time
      OE HIGH to address invalid
      time
      XCLK HIGH to OE LOW time
      XCLK HIGH to OE HIGH
      time
      Write cycle parameters
      t
      AVCSL
      address valid to CS LOW
      time
      t
      CSLDV
      CS LOW to data valid time
      t
      CSLWEL
      CS LOW to WE LOW time
      t
      CSLBLSL
      CS LOW to BLS LOW time
      t
      WELDV
      WE LOW to data valid time
      t
      CSLDV
      CS LOW to data valid time
      t
      WELWEH
      WE LOW to WE HIGH time
      [2][3]
      (T
      cy(CCLK)
      (2 + WST1)) +
      (
      20)
      -
      -
      ns
      t
      am(sbr)
      [2][4]
      T
      cy(CCLK)
      + (
      20)
      -
      -
      ns
      t
      h(D)
      t
      CSHOEH
      t
      OEHANV
      [5]
      0
      -
      -
      -
      -
      +5
      +5
      ns
      ns
      ns
      5
      5
      t
      CHOEL
      t
      CHOEH
      5
      5
      -
      -
      +5
      +5
      ns
      ns
      [1]
      T
      cy(CCLK)
      10
      -
      -
      ns
      5
      5
      5
      5
      5
      -
      -
      -
      -
      -
      -
      +5
      +5
      +5
      +5
      +5
      T
      cy(CCLK)
      (1 +
      WST2) + 5
      T
      cy(CCLK)
      (1 + WST2) + 5
      T
      cy(CCLK)
      + 5
      ns
      ns
      ns
      ns
      ns
      ns
      [2]
      T
      cy(CCLK)
      (1 + WST2)
      5
      t
      BLSLBLSH
      BLS LOW to BLS HIGH time
      [2]
      T
      cy(CCLK)
      (1 + WST2)
      5
      -
      ns
      t
      WEHANV
      WE HIGH to address invalid
      time
      WE HIGH to data invalid time
      BLS HIGH to address invalid
      time
      [2]
      T
      cy(CCLK)
      5
      -
      ns
      t
      WEHDNV
      t
      BLSHANV
      [2]
      (2
      T
      cy(CCLK)
      )
      5
      [2]
      T
      cy(CCLK)
      5
      -
      -
      (2
      T
      cy(CCLK)
      ) + 5
      T
      cy(CCLK)
      + 5
      ns
      ns
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      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      LPC2212FBD144,551 功能描述:ARM微控制器 - MCU PREF PART LPC2212FBD144/01-S RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
      LPC2212FBD144/00 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16/32-bit ARM microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC and external memory interface
      LPC2212FBD144/01 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-144 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-144, Controller Family/Series:LPC2200, Core Size:16bit / 32bit, No. of I/O's:112, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:LQFP, No. of Pins:144, Program Memory
      LPC2212FBD144/01,5 功能描述:ARM微控制器 - MCU ARM7 128KF/16KR/ADC RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
      LPC2212FBD144/01,551 制造商:PHILIPS_SEMI 功能描述: