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| 型號： | LPC2148 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC |
| 中文描述： | 單芯片16-bit/32-bit微控制器，高達(dá)512的ISP /國際檢察官聯(lián)合會的USB 2.0全速設(shè)備，10位ADC和DAC kB閃存 |
| 文件頁數(shù)： | 28/38頁 |
| 文件大小： | 193K |
| 代理商： | LPC2148 |
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9397 750 14985
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 3 October 2005
28 of 38
Philips Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
[1]
Typical ratings are not guaranteed. The values listed are at room temperature (+25 C), nominal supply voltages.
[2]
Core and external rail.
[3]
The RTC typically fails when V
i(VBAT)
drops below 1.6 V.
Including voltage on outputs in 3-state mode.
[4]
[5]
V
DD
supply voltages must be present.
3-state outputs go into 3-state mode when V
DD
is grounded.
Accounts for 100 mV voltage drop in all supply lines.
[6]
[7]
[8]
Only allowed for a short time period.
[9]
Minimum condition for V
I
= 4.5 V, maximum condition for V
I
= 5.5 V.
[10] Applies to P1.16 to P1.31.
[11] On pin VBAT.
[12] Optimized for low battery consumption.
[13] To V
SS
.
[14] Includes external resistors of 18
1 % on D+ and D
.
[1]
Conditions: V
SSA
= 0 V, V
DDA
= 3.3 V.
The ADC is monotonic, there are no missing codes.
[2]
[3]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 6
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 6
.
[4]
[5]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 6
.
[6]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 6
.
V
OL
V
OH
C
trans
Z
DRV
LOW output level
HIGH output level
transceiver capacitance
driver output impedance
for driver which is not
high-speed capable
pull-up resistance
R
L
of 1.5 k
to 3.6 V
R
L
of 15 k
to GND
pin to GND
steady state drive
-
2.8
-
-
-
-
-
0.3
3.6
20
44
V
V
pF
[14]
29
R
pu
SoftConnect = ON
1.1
-
1.9
k
Table 5:
T
a
=
40
°
C to +85
°
C for commercial applications, unless otherwise specified.
Symbol
Parameter
Static characteristics
…continued
Conditions
Min
Typ
[1]
Max
Unit
Table 6:
V
DDA
= 2.5 V to 3.6 V; T
a
=
40
°
C to +85
°
C unless otherwise specified. ADC frequency 4.5 MHz.
Symbol
Parameter
Conditions
V
ia
analog input voltage
C
ia
analog input capacitance
E
D
differential linearity error
E
L(adj)
integral non-linearity
E
O
offset error
E
G
gain error
E
T
absolute error
R
vsi
voltage source interface
resistance
ADC static characteristics
Min
0
-
Typ
-
-
-
-
-
-
-
-
Max
V
DDA
1
±
1
±
2
±
3
±
0.5
±
4
40
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
[1] [2] [3]
-
[1] [4]
-
[1] [5]
-
[1] [6]
-
[1] [7]
-
[8]
-
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