參數(shù)資料
型號(hào): LPC2103FBD48,151
廠商: NXP Semiconductors
文件頁(yè)數(shù): 14/37頁(yè)
文件大?。?/td> 0K
描述: IC ARM7 MCU FLASH 32K 48-LQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
ARM7 Architecture
ARM7 Memory
標(biāo)準(zhǔn)包裝: 250
系列: LPC2100
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 70MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 704 (CN2011-ZH PDF)
配用: 568-4310-ND - EVAL BOARD LPC2158 W/LCD
568-4302-ND - BOARD EVAL LPC210X KS2103 JLINK
568-4301-ND - BOARD EVAL LPC210X KS2103
568-4300-ND - BOARD EVAL LPC210X MCB2103
568-4297-ND - BOARD EVAL LPC21XX MCB2100
MCB2103UME-ND - BOARD EVAL MCB2103 + ULINK-ME
MCB2103U-ND - BOARD EVAL MCB2103 + ULINK2
622-1013-ND - BOARD FOR LPC2103 48-LQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-2094
935280966151
LPC2103FBD48-S
LPC2101_02_03_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 2 June 2009
21 of 37
NXP Semiconductors
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers
6.18.1 EmbeddedICE
Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of
the target system requires a host computer running the debugger software and an
EmbeddedICE protocol converter. The EmbeddedICE protocol converter converts the
remote debug protocol commands to the JTAG data needed to access the ARM core.
The ARM core has a debug communication channel function built-in. The debug
communication channel allows a program running on the target to communicate with the
host debugger or another separate host without stopping the program ow or even
entering the debug state. The debug communication channel is accessed as a
coprocessor 14 by the program running on the ARM7TDMI-S core. The debug
communication channel allows the JTAG port to be used for sending and receiving data
without affecting the normal program ow. The debug communication channel data and
control registers are mapped in to addresses in the EmbeddedICE logic. The JTAG clock
(TCK) must be slower than 1
6 of the CPU clock (CCLK) for the JTAG interface to operate.
6.18.2 RealMonitor
RealMonitor is a congurable software module, developed by ARM Inc., which enables
real time debug. It is a lightweight debug monitor that runs in the background while users
debug their foreground application. It communicates with the host using the DCC, which is
present in the EmbeddedICE logic. The LPC2101/02/03 contain a specic conguration of
RealMonitor software programmed into the on-chip boot ROM memory.
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