參數(shù)資料
型號(hào)： LPC1315FBD48,551
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 4/77頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 32KB FLASH 48LQFP
標(biāo)準(zhǔn)包裝： 250
系列： LPC13xx
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 72MHz
連通性： I²C，Microwire，SPI，SSI，SSP，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 40
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大小： 2K x 8
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-LQFP
包裝： 托盤
其它名稱： 568-9591
LPC1315_16_17_45_46_47
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 20 September 2012
12 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
6.2 Pin description
Table 3.
Pin description (LPC1315/16/17 - no USB)
Symbol
LQ
FP
64
LQ
FP
48
HVQFN3
3
R
e
se
ts
tate
Ty
p
e
Description
RESET/PIO0_0
4
3
2
I; PU
I
RESET — External reset input with 20 ns glitch filter. A
LOW-going pulse as short as 50 ns on this pin resets the
device, causing I/O ports and peripherals to take on their
default states, and processor execution to begin at
address 0. This pin also serves as the debug select input.
LOW level selects the JTAG boundary scan. HIGH level
selects the ARM SWD debug mode.
-I/O
PIO0_0 — General purpose digital input/output pin.
PIO0_1/CLKOUT/
CT32B0_MAT2
54
3
I; PU
I/O
PIO0_1 — General purpose digital input/output pin. A
LOW level on this pin during reset starts the ISP
command handler.
-O
CLKOUT — Clockout pin.
-O
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2/SSEL0/
CT16B0_CAP0
13
10
8
I; PU
I/O
PIO0_2 — General purpose digital input/output pin.
I/O
SSEL0 — Slave select for SSP0.
I
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3
19
14
9
I; PU
I/O
PIO0_3 — General purpose digital input/output pin.
PIO0_4/SCL
20
15
10
IA
I/O
PIO0_4 — General purpose digital input/output pin
(open-drain).
-I/O
SCL — I2C-bus clock input/output (open-drain).
High-current sink only if I2C Fast-mode Plus is selected in
the I/O configuration register.
PIO0_5/SDA
21
16
11
IA
I/O
PIO0_5 — General purpose digital input/output pin
(open-drain).
-I/O
SDA — I2C-bus data input/output (open-drain).
High-current sink only if I2C Fast-mode Plus is selected in
the I/O configuration register.
PIO0_6/R/
SCK0
29
22
15
I; PU
I/O
PIO0_6 — General purpose digital input/output pin.
--
R — Reserved.
-I/O
SCK0 — Serial clock for SSP0.
PIO0_7/CTS
30
23
16
I; PU
I/O
PIO0_7 — General purpose digital input/output pin
(high-current output driver).
-I
CTS — Clear To Send input for USART.
PIO0_8/MISO0/
CT16B0_MAT0
36
27
17
I; PU
I/O
PIO0_8 — General purpose digital input/output pin.
-I/O
MISO0 — Master In Slave Out for SSP0.
-O
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9/MOSI0/
CT16B0_MAT1/
SWO
37
28
18
I; PU
I/O
PIO0_9 — General purpose digital input/output pin.
-I/O
MOSI0 — Master Out Slave In for SSP0.
-O
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
-O
SWO — Serial wire trace output.
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