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參數(shù)資料
| 型號： | LP87C52 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 19/23頁 |
| 文件大小： | 319K |
| 代理商： | LP87C52 |
8XC52/54/58
PROGRAMMING THE EPROM
The part must be running with a 4 MHz to 6 MHz
oscillator. The address of an EPROM location to be
programmed is applied to address lines while the
code byte to be programmed in that location is ap-
plied to data lines. Control and program signals must
be held at the levels indicated in Table 4. Normally
EA/V
PP
is held at logic high until just before ALE/
PROG is to be pulsed. The EA/V
PP
is raised to V
PP
,
ALE/PROG is pulsed low and then EA/V
PP
is re-
turned to a high (also refer to timing diagrams).
NOTES:
#
Exceeding the V
PP
maximum for any amount of
time could damage the device permanently. The
V
PP
source must be well regulated and free of
glitches.
DEFINITION OF TERMS
ADDRESS LINES:
P1.0–P1.7, P2.0–P2.5 respec-
tively for A0–A13.
DATA LINES:
P0.0–P0.7 for D0–D7.
CONTROL SIGNALS:
RST, PSEN, P2.6, P2.7, P3.3,
P3.6, P3.7
PROGRAM SIGNALS:
ALE/PROG, EA/V
PP
Table 4. EPROM Programming Modes
Mode
RST
PSEN
ALE/
PROG
EA/
V
PP
P2.6
P2.7
P3.3
P3.6
P3.7
Program Code Data
H
L
12.75V
L
H
H
H
H
Verify Code Data
H
L
H
H
L
L
L
H
H
Program Encryption
Array Address 0–3FH
H
L
12.75V
L
H
H
L
H
Program Lock
Bits
Bit 1
H
L
12.75V
H
H
H
H
H
Bit 2
H
L
12.75V
H
H
H
L
L
Bit 3
H
L
12.75V
H
L
H
H
L
Read Signature Byte
H
L
H
H
L
L
L
L
L
19
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