參數(shù)資料
型號: LP87C51FC-20
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
中文描述: 8-BIT, OTPROM, 20 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 14/18頁
文件大?。?/td> 250K
代理商: LP87C51FC-20
AUTOMOTIVE 87C51FA/FB/FC/FC-20
AC TESTING INPUT, OUTPUT WAVEFORMS
270961–17
AC Inputs during testing are driven at V
CC
b
0.5V for a Logic ‘‘1’’
and 0.45V for a Logic ‘‘0’’. Timing measurements are made at V
IH
min for a Logic ‘‘1’’ and V
IL
max for a Logic ‘‘0’’.
FLOAT WAVEFORMS
270961–18
For timing purposes a port pin is no longer floating when a
100 mV change from load voltage occurs, and begins to float
when a 100 mV change from the loaded V
OH
/V
OL
level occurs.
I
OL
/I
OH
t g
20 mA.
Table 3. EPROM Programming Modes
Mode
RST
PSEN
ALE/
PROG
EA/
V
PP
P2.6
P2.7
P3.3
P3.6
P3.7
Program Code Data
H
L
12.75V
L
H
H
H
H
Verify Code Data
H
L
H
H
L
L
L
H
H
Program Encryption
Array Address 0–3FH
H
L
12.75V
L
H
H
L
H
Program Lock
Bits
Bit 1
H
L
12.75V
H
H
H
H
H
Bit 2
H
L
12.75V
H
H
H
L
L
Bit 3
H
L
12.75V
H
L
H
H
L
Read Signature Byte
H
L
H
H
L
L
L
L
L
DEFINITION OF TERMS
(EPROM PROGRAMMING)
ADDRESS LINES:
P1.0–P1.7, P2.0–P2.5, P3.4–
P3.5 respectively for A0–A13.
DATA LINES:
P0.0–P0.7 for D0–D7.
CONTROL SIGNALS:
RST, PSEN, P2.6, P2.7, P3.3,
P3.6, P3.7
PROGRAM SIGNALS:
ALE/PROG, EA/V
PP
PROGRAMMING THE EPROM
The part must be running with a 4 MHz to 6 MHz
oscillator. The address of an EPROM location to be
programmed is applied to address lines while the
code byte to be programmed in that location is ap-
plied to data lines. Control and program signals must
be held at the levels indicated in Table 3. Normally
EA/V
PP
is held at logic high until just before ALE/
PROG is to be pulsed. The EA/V
PP
is raised to V
PP
,
ALE/PROG is pulsed low and then EA/V
PP
is re-
turned to a high (also refer to timing diagrams).
NOTE:
Exceeding the V
PP
maximum for any amount of
time could damage the device permanently. The
V
PP
source must be well regulated and free of
glitches.
14
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