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參數(shù)資料
| 型號： | LP8340 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low Dropout, Low IQ, 1.0A CMOS Linear Regulator |
| 中文描述： | 低壓差，低IQ，1.0安培的CMOS線性穩(wěn)壓器 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 304K |
| 代理商： | LP8340 |
LP8340I Electrical Characteristics
(Continued)
Unless otherwise specified all limits guaranteed for V
= V
O
+ 1V, C
IN
= C
OUT
= 10μF, T
J
= 25C.
Boldface
limits apply over
the full operating temperature range of T
J
= 40C to 125C
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
T
SD
Thermal Shutdown
Temp.
Thermal Shutdown Hyst.
ADJ Input Leakage
Current
V
OUT
Leakage Current
160
10
±
0.01
C
V
ADJ
= 1.5V or 0V
±
100
nA
LP8340-ADJ
ADJ = OUT, V
OUT
= 2V, V
IN
= 10V
LP8340-1.8, V
OUT
= 2.5V, V
IN
= 10V
LP8340-2.5, V
OUT
= 3.5V, V
IN
= 10V
LP8340-3.3, V
OUT
= 4V, V
IN
= 10V
LP8340-5.0, V
OUT
= 6V, V
IN
= 10V
10Hz to 10kHz, R
L
= 1k
, C
OUT
= 10μF
10
10
10
10
10
μA
e
n
Output Noise
250
μVrms
Note 1:
Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not apply when operating the device outside of its
rated operating conditions.
Note 2:
All voltages are with respect to the potential at the ground pin.
Note 3:
Maximum Power dissipation for the device is calculated using the following equations:
where T
J(MAX)
is the maximum junction temperature, T
A
is the ambient temperature, and
θ
JA
is the junction-to-ambient thermal resistance. The value of the
θ
JA
for
the LLP package is specifically dependant on the PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and
power dissipation for the LLP package, refer to Application Note AN-1187.
Note 4:
Typical Values represent the most likely parametric norm.
Note 5:
All limits are guaranteed by testing or statistical analysis.
Note 6:
Human body model 1.5k
in series with 100pF.
Note 7:
Condition does not apply to input voltages below 2.7V since this is the minimum input operating voltage.
Note 8:
Dropout voltage is measured by reducing V
IN
until V
O
drops 100mV from its normal value.
L
www.national.com
7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP8340A-2.5 E WAF | 制造商:Texas Instruments 功能描述: |
| LP8340A-3.3 E WAF | 制造商:Texas Instruments 功能描述: |
| LP8340A-5.0 E WAF | 制造商:Texas Instruments 功能描述: |
| LP8340C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Dropout, Low IQ, 1.0A CMOS Linear Regulator |
| LP8340CDT-1.8 | 制造商:Texas Instruments 功能描述:V REG LDO 1A 1.8V 8340 TO-252-3 |
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