參數(shù)資料
型號(hào): LP62S2048AV-55LLT
廠商: AMIC Technology Corporation
英文描述: 256K X 8 BIT LOW VOLTAGE CMOS SRAM
中文描述: 256K × 8位低電壓CMOS的SRAM
文件頁(yè)數(shù): 11/17頁(yè)
文件大?。?/td> 190K
代理商: LP62S2048AV-55LLT
LP62S2048A-I Series
PRELIMINARY
(June, 2002, Version 0.0)
3
AMIC Technology, Inc.
Pin Configurations
n
n SOP
n
n TSOP/(TSSOP)
n
n CSP (Chip Size Package)
36-pin Top View
Block Diagram
ROW
DECODER
1024 X 2048
MEMORY ARRAY
INPUT DATA
CIRCUIT
COLUMN I/O
CONTROL
CIRCUIT
CE2
CE1
WE
I/O8
I/O1
A17
A16
A15
A0
VCC
GND
OE
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
I/O4
GND
I/O5
I/O6
I/O7
I/O8
A10
A9
A8
A13
CE2
A15
VCC
A11
LP62S2048AM-I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
OE
LP62S2048AV-I
(LP62S2048AX-I)
1
16
17
32
Pin No.
Pin
Name
Pin No.
Pin
Name
1
2
A9
3
4
5
6
7
8
9
10
11
12
13
14
30
29
28
27
26
25
24
22
19
21
20
23
18
17
A8
A13
CE2
A15
VCC
A17
I/O8
A16
A14
A12
A7
A6
A3
A2
A1
A0
I/O1
I/O2
GND
I/O4
I/O5
I/O6
I/O7
I/O3
A11
WE
CE1
15
16
31
32
A5
A4
A10
OE
CE1
WE
A0
I/O5
I/O6
GND
VCC
I/O7
I/O8
A9
A10
OE
A11
CE1
A12
A13
A14
A16
NC
A17
A15
I/O4
I/O3
I/O2
I/O1
GND
VCC
A1
A2
CE2
WE
NC
A5
A4
A3
A6
A7
A8
6
5
4
3
2
1
A
B
C
D
E
F
G
H
相關(guān)PDF資料
PDF描述
LP62S2048AV-70LLI 256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AV-70LLT 256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AX-55LLT CAC 3C 3#12 PIN PLUG
LP62S4096EU-70LLT 512K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S4096EV-55LLI 512K X 8 BIT LOW VOLTAGE CMOS SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LP62S2048AV-70LLI 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AV-70LLT 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AX-55LLI 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AX-55LLT 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM
LP62S2048AX-70LLI 制造商:AMICC 制造商全稱(chēng):AMIC Technology 功能描述:256K X 8 BIT LOW VOLTAGE CMOS SRAM