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參數(shù)資料
| 型號(hào)： | LP61L1008AS-10 |
| 廠商： | AMIC Technology Corporation |
| 元件分類： | SRAM |
| 英文描述： | 128K x 8 bit high speed 3.3V center power CMOS SRAM |
| 中文描述： | 128K的× 8位高速3.3V的中心功耗CMOS SRAM |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大?。?/td> | 118K |
| 代理商： | LP61L1008AS-10 |
LP61L1008A
PRELIMINARY
(August, 2001, Version 1.0)
8
AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
tWC
Address
CE
DIN
tDH
tDW
(4)
tCW5
tAW
tWR3
WE
DOUT
tWHZ7
tWP2
tCW5
tAS1
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE .
3. tWR is measured from the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition with the WE low transition or after the WE transition, outputs remain in a high
impedance state.
5. tCW is measured from the later of CE going low to the end of Write.
6. OE is continuously low. ( OE = VIL)
7. Transition is measured
±500mV from steady state. This parameter is sampled and not 100% tested.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP61L1008AS-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008AS-8 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008S-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008S-15 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
| LP61L1008X-12 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM |
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