- 您現(xiàn)在的位置：買賣IC網 > PDF目錄224109 > LP3918TLX-L (NATIONAL SEMICONDUCTOR CORP) Battery Charge Management and Regulator Unit PDF資料下載
參數(shù)資料
| 型號： | LP3918TLX-L |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Battery Charge Management and Regulator Unit |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBGA25 |
| 封裝： | 2.50 X 2.50 MM, MICRO, SMD-25 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 1292K |
| 代理商： | LP3918TLX-L |
第1頁第2頁當前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
Serial Interface
Unless otherwise noted, V
IN ( = VIN1 = VIN2 = BATT) = 3.6V, GND = 0V, CVIN1-2=10F, CLDOX=1F, and VLDO2 (DIG) = 3.0V.
Typical values and limits appearing in normal type apply for T
J = 25°C. Limits appearing in boldface type apply over the entire
junction temperature range for operation, T
Symbol
Parameter
Condition
Typ
Limit
Units
Min
Max
f
CLK
Clock Frequency
400
kHz
t
BF
Bus-Free Time between START
and STOP
1.3
s
t
HOLD
Hold Time Repeated START
Condition
0.6
s
t
CLK-LP
CLK Low Period
1.3
s
t
CLK-HP
CLK High Period
0.6
s
t
SU
Set-Up Time Repeated START
Condition
0.6
s
t
DATA-HOLD
Data Hold Time
50
ns
t
DATA-SU
Data Set-Up Time
100
ns
t
SU
Set-Up Time for STOP Condition
0.6
s
t
TRANS
Maximum Pulse Width of Spikes
that Must be Suppressed by the
Input Filter of both DATA & CLK
Signals
50
ns
Note 1:
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pin.
Note 3:
Internal Thermal Shutdown circuitry protects the device from permanent damage.
Note 4:
The human-body model is 100pF discharged through 1.5k
. The machine model is a 200pF capacitor discharged directly into each pin, MIL-STD-883
3015.7.
Note 5:
Care must be exercised where high power dissipation is likely. The maximum ambient temperature may have to be derated.
Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. In applications where high
power dissipation and/or poor thermal dissipation exists, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T
A_MAX)
is dependent on the maximum power dissipation of the device in the application (P
D_MAX), and the junction to ambient thermal resistance of the device/package
in the application (
θ
JA), as given by the following equation:
T
A_MAX = TJ_MAX-OP – (θJA X PDMAX ).
Note 6:
All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T
J = 25°C. All hot and cold limits
are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
Note 7:
Guaranteed by design.
Note 8:
Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply
in cases it implies operation with an input voltage below the 3.0V minimum appearing under Operating Ratings. For example, this specification does not apply
for devices having 1.5V outputs because the specification would imply operation with an input voltage at or about 1.5V.
Note 9:
Junction-to-ambient thermal resistance (
θ
JA) is taken from thermal modelling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The value of (
θ
JA) of this product could fall within a wide range, depending on PWB material, layout, and environmental conditions. In
applications where high maximum power dissipation exists (high V
IN, high IOUT), special care must be paid to thermal dissipation issues in board design.
Note 10:
Full charge current is guaranteed for CHG_IN = 4.5 to 6.0V. At higher input voltages, increased power dissipation may cause the thermal regulation to
limit the current to a safe level, resulting in longer charging time.
11
www.national.com
LP3918
相關PDF資料 |
PDF描述 |
|---|---|
| LPB-5015 | PULSE TRANSFORMER FOR GENERAL PURPOSE APPLICATION(S) |
| LPC870-F2G2-1 | SINGLE COLOR LED, PURE GREEN |
| LPD3015-682MTD | 2 ELEMENT, 6.8 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD |
| LPD3015-682MSD | 2 ELEMENT, 6.8 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD |
| LPD3015-682MSB | 2 ELEMENT, 6.8 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LP3919 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CDMA Power Management Unit |
| LP3919RL-A/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3919RL-B/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3919RL-C/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3919RL-D/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。