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參數(shù)資料
| 型號(hào)： | LP2995 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Hex Inverters 14-SO -40 to 85 |
| 中文描述： | DDR終端穩(wěn)壓器 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大小： | 291K |
| 代理商： | LP2995 |
Component Selection
(Continued)
the best solution when size and performance are critical,
although their cost is typically higher than any other capaci-
tor.
Capacitor recommendations for different application circuits
can be seen in the accompanying application notes with
supporting evaluation boards.
Thermal Dissipation
Since the LP2995 is a linear regulator any current flow from
V
will result in internal power dissipation generating heat.
To prevent damaging the part from exceeding the maximum
allowable junction temperature, care should be taken to
derate the part dependent on the maximum expected ambi-
ent temperature and power dissipation. The maximum allow-
able internal temperature rise (T
) can be calculated
given the maximum ambient temperature (T
) of the
application and the maximum allowable junction temperature
(T
Jmax
).
T
Rmax
= T
Jmax
T
Amax
From this equation, the maximum power dissipation (P
Dmax
)
of the part can be calculated:
P
Dmax
= T
Rmax
/
θ
JA
The
θ
JA
of the LP2995 will be dependent on several vari-
ables: the package used; the thickness of copper; the num-
ber of vias and the airflow. For instance, the
θ
JA
of the SO-8
is 163C/W with the package mounted to a standard 8x4
2-layer board with 1oz. copper, no airflow, and 0.5W dissi-
pation at room temperature. This value can be reduced to
151.2C/W by changing to a 3x4 board with 2 oz. copper that
is the JEDEC standard.
Figure 2
shows how the
θ
JA
varies
with airflow for the two boards mentioned.
Layout is also extremely critical to maximize the output
current with the LLP package. By simply placing vias under
the DAP the
θ
can be lowered significantly.
Figure 3
shows
the LLP thermal data when placed on a 4-layer JEDEC
board with copper thickness of 0.5/1/1/0.5 oz. The number of
vias, with a pitch of 1.27 mm, has been increased to the
maximum of 4 where a
θ
of 50.41C/W can be obtained.
Via wall thickness for this calculation is 0.036 mm for 1oz.
Copper.
Additional improvements in lowering the
θ
JA
can also be
achieved with a constant airflow across the package. Main-
taining the same conditions as above and utilizing the 2x2
via array,
Figure 4
shows how the
θ
JA
varies with airflow.
20039321
θ
JA
vs Airflow (SO-8)
FIGURE 2.
20039322
LLP-16
θ
JA
vs
#
of Vias (4 Layer JEDEC Board))
FIGURE 3.
20039323
θ
JA
vs Airflow Speed (JEDEC Board with 4 Vias)
FIGURE 4.
L
www.national.com
8
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| LP2996LQ | DDR Termination Regulator |
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| LP2996MR | DDR Termination Regulator |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP2995LQ | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP2995LQ/7002047 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| LP2995LQ/J7002047 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| LP2995LQ/NOPB | 功能描述:低壓差穩(wěn)壓器 - LDO RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LP2995LQEVAL | 功能描述:其他開發(fā)工具 LP2995LQ EVAL BOARD RoHS:否 制造商:Parallax 產(chǎn)品:ELEV-8 Hex Upgrade Kits 類型:Robotics 工具用于評(píng)估:ELEV-8 Quadcopter 工作電源電壓: |
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