參數(shù)資料
型號: LP2994MX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: DDR Termination Regulator
中文描述: BUS TERMINATOR SUPPORT CIRCUIT, PDSO8
封裝: SOP-8
文件頁數(shù): 14/15頁
文件大?。?/td> 257K
代理商: LP2994MX
Typical Application Circuits
(Continued)
with the DDR-SDRAM DIMMs mounted on modules. As a
result bulk aluminum electrolytic capacitors in the range of
1000uF are typically used.
PCB Layout Considerations
1.
The input capacitor for the power rail should be placed
as close as possible to the PVIN pin.
2.
V
SENSE
should be connected to the V
TT
termination bus
at the point where regulation is required. For mother-
board applications an ideal location would be at the
center of the termination bus.
3.
V
can be connected remotely to the V
rail input
at either the DIMM or the Chipset. This provides the
most accurate point for creating the reference voltage.
4.
For improved thermal performance excessive top side
copper should be used to dissipate heat from the pack-
age. Numerous vias from the ground connection to the
internal ground plane will help. Additionally these can be
located underneath the package if manufacturing stan-
dards permit.
Care should be taken when routing the V
trace to
avoid noise pickup from switching I/O signals. A 0.1uF
ceramic capacitor located close to the V
can also
be used to filter any unwanted high frequency signal.
This can be an issue especially if long V
SENSE
traces are
used.
5.
L
www.national.com
14
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PDF描述
LP2995LQX DDR Termination Regulator
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LP2995M DDR Termination Regulator
LP2995LQ DDR Termination Regulator
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