參數(shù)資料
型號: LP2994M
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: DDR Termination Regulator
中文描述: BUS TERMINATOR SUPPORT CIRCUIT, PDSO8
封裝: SOP-8
文件頁數(shù): 3/15頁
文件大小: 257K
代理商: LP2994M
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
(Note 1)
PVIN, AVIN, VTT, VDDQ, SD to GND
Storage Temp. Range
Junction Temperature
Lead Temperature (Soldering, 10 sec)
ESD Rating (Note 2)
0.3V to +6V
65C to +150C
150C
260C
2kV
Operating Range
Junction Temp. Range (Note 3)
AVIN Supply Voltage
PVIN Supply Voltage
0C to +125C
2.2V to 5.5V
-0.3V to (AVIN +
0.3V)
SD Input Voltage
-0.3V to (AVIN +
0.3V)
VTT Output Voltage
-0.3V to (PVIN +
0.3V)
SO-8 Thermal Resistance (
θ
JA
)
151C/W
Electrical Characteristics
type
apply over the full
Operating Temperature Range
(T
J
= 0C to +125C). Unless otherwise specified,
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 4).
Specifications with standard typeface are for T
J
= 25C and limits in
boldface
Symbol
Parameter
Conditions
Min
1.108
1.210
1.305
Typ
1.138
1.236
1.334
272
Max
1.168
1.260
1.360
400
Units
V
TT
V
TT
Output Voltage
I
OUT
= 0A (Note 5)
VIN=VDDQ = 2.3V
VIN=VDDQ = 2.5V
VIN=VDDQ = 2.7V
I
OUT
= 0A
(Note 6)
V
I
q
Quiescent Current
μA
Z
VDDQ
I
QSD
VDDQ Input Impedance
Quiescent current in
shutdown
Shutdown Leakage
Current
Minimum Shutdown High
Level
Maximum Shutdown Low
Level
Load Regulation
(Note 7)
86
100
21
k
μA
45
I
SD
SD = 0V
SD = 2.5V
2
2
5
μA
nA
V
V
IH
1.9
V
IL
0.8
V
V
TT
/V
TT
I
OUT
= 0 to 1.5A
I
OUT
= 0 to 1.5A
-0.4
+0.4
100
%
I
SENSE
SENSE Input Current
pA
Note 1:
Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2:
The human body model is a 100pF capacitor discharged through a 1.5k
resistor into each pin.
Note 3:
At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at
θ
JA
= 151.2 C/W
junction to ambient with no heat sink.
Note 4:
Limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5:
VIN is defined as the VIN = AVIN = PVIN
Note 6:
Quiescent current defined as the current flow into AVIN.
Note 7:
Load regulation is tested by using a 10ms current pulse and measuring V
TT
.
L
www.national.com
3
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