參數(shù)資料
型號: LP2975AIMMX-5.0
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號調(diào)理
英文描述: MOSFET LDO Driver/Controller
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: MINI, SOP-8
文件頁數(shù): 18/19頁
文件大小: 715K
代理商: LP2975AIMMX-5.0
Application Hints
(Continued)
1) Calculate the required value of capacitance for C
so
that the pole f
200 Hz (see previous section OUTPUT CA-
PACITOR). For this calculation, an ESR of about 0.1
can
be assumed for the purpose of determining C
OUT
.
IMPORTANT:
If a smaller value of output capacitor is used
(so that the value of f
>
200 Hz), the phase margin of the
control loop will be reduced. This will result in increased ring-
ing on the output voltage during a load transient. If the output
capacitor is made extremely small, oscillations will result.
To illustrate this effect, scope photos have been presented
showing the output voltage of reference design
#
2 as the
output capacitor is reduced to approximately 1/30 of the
nominal value (the value which sets f
= 200 Hz). As shown,
the effect of deviating from the nominal value is gradual and
the regulator is quite robust in resisting going into oscilla-
tions.
2) Approximate the crossover frequency f
using the equa-
tion in the previous section CROSSOVER FREQUENCY
AND PHASE MARGIN
3) Calculate the required ESR of the output capacitor so that
the frequency of the zero f
is set to 0.5 f
c
(see previous sec-
tion OUTPUT CAPACITOR).
4) Calculate the value of the feed-forward capacitor C
so
that the zero f
zf
occurs at the frequency which yields the
maximum phase gain for the output voltage selected (see
previous section LOW OUTPUT VOLTAGE AND C
). The
formula for calculating C
F
is in the previous section FEED-
FORWARD CAPACITOR
Lower ESR electrolytics are available which use organic
electrolyte (OSCON types), but are more costly than typical
aluminum electrolytics.
If the calculated value of ESR is higher than what is found in
the selected capacitor, an external resistor can be placed in
series with C
OUT
.
LOW VOLTAGE DESIGNS
: Designs which have a low out-
put voltage (where the positive effects of C
are very small)
may be marginally stable if the C
OUT
and ESR values are not
carefully selected.
Also, if the FET gate capacitance is large (as in the case of
a high-current FET), the pole f
could possibly get low
enough in frequency to cause a problem.
The solution in both cases is to increase the amount of out-
put capacitance which will shift f
to a lower frequency (and
reduce overall loop bandwidth). The ESR and C
calcula-
tions should be repeated, since this changes the crossover
frequency f
c
.
www.national.com
18
相關(guān)PDF資料
PDF描述
LP2975AIMM-3.3 Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
LP2975AIMMX-12 Quadruple 2-Input Exclusive-OR Gates 14-TVSOP -40 to 85
LP2975AIMMX-3.3 Quadruple 2-Input Exclusive-OR Gates 14-TVSOP -40 to 85
LP2975IMM-3.3 MOSFET LDO Driver/Controller
LP2975IMMX-12 Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85
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