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參數(shù)資料
| 型號： | LP2975AIMM-3.3 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85 |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | MINI, SOP-8 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 715K |
| 代理商： | LP2975AIMM-3.3 |
Application Hints
(Continued)
For maximum accuracy, the INPUT and CURRENT LIMIT
pins must be Kelvin connected to R
, to avoid errors
caused by voltage drops along the traces carrying the cur-
rent from the input supply to the Source pin of the FET.
EXTERNAL CAPACITORS
The best capacitors for use in a specific design will depend
on voltage and load current (examples of tested circuits for
several different output voltages and currents are provided in
a previous section.)
Information in the next sections is provided to aid the de-
signer in the selection of the external capacitors.
INPUT CAPACITOR:
Although not always required, an input
capacitor is recommended. Good bypassing on the input as-
sures that the regulator is working from a source with a low
impedance, which improves stability. A good input capacitor
can also improve transient response by providing a reservoir
of stored energy that the regulator can utilize in cases where
the load current demand suddenly increases. The value
used for C
may be increased without limit. Refer to the Ref-
erence Designs section for examples of input capacitors.
OUTPUT CAPACITOR
: The output capacitor is required for
loop stability (compensation) as well as transient response.
During sudden changes in load current demand, the output
capacitor must source or sink current during the time it takes
the control loop of the LP2975 to adjust the gate drive to the
pass FET.As a general rule, a larger output capacitor will im-
prove both transient response and phase margin (stability).
The value of C
OUT
may be increased without limit.
OUTPUT CAPACITOR AND COMPENSATION: Loop com-
pensation for the LP2975 is derived from C
and, in some
cases, the feed-forward capacitor C
F
(see next section).
C
forms a pole (referred to as
f
) in conjuction with the
load resistance which causes the loop gain to roll off (de-
crease) at an additional 20 dB/decade. The frequency of
the pole is:
f
p
= 0.16 / [ (R
L
+ ESR) x C
OUT
]
Where:
R
L
is the
load resistance.
C
OUT
is the
value of the output capacitor.
ESR
is the
equivalent series resistance of C
OUT
.
As a general guideline, the frequency of f
should be
≤
200
Hz. It should be noted that higher load currents correspond
to lower values of R
, which requires that C
OUT
be increased
to keep f
p
at a given frequency.
DESIGN EXAMPLE:
Select the minimum required output
capacitance for a design whose output specifications are 5V
@
1A:
f
p
= 0.16 / [ (R
L
+ ESR) x C
OUT
]
Re-written:
C
OUT
= 0.16 / [f
p
x (R
L
+ ESR) ]
Values used for the calculation:
f
p
= 200 Hz, R
L
= 5
, ESR = 0.1
(assumed).
Solving for C
, we get
157 μF
(nearest standard size
would be 180 μF).
The ESR of the output capacitor is very important for stabil-
ity, as it creates a zero (
f
) which cancels much of the phase
shift resulting from one of the poles present in the loop. The
frequency of the zero is calculated from:
f
z
= 0.16 / (ESR x C
OUT
)
For best results in most designs, the frequency of f
should
fall between 5 kHz and 50 kHz. It must be noted that the val-
ues of C
and ESR usually vary with temperature (se-
verely in the case of aluminum electrolytics), and this must
be taken into consideration.
For the design example (V
= 5V
@
1A), select a capacitor
which meets the f
z
requirements. Solving the equation for
ESR yields:
ESR = 0.16 / (f
z
x C
OUT
)
Assuming f
= 5 kHz and 50 kHz, the limiting values of ESR
for the 180 μF capacitor are found to be:
18 m
≤
ESR
≤
0.18
A good-quality, low-ESR capacitor type such as the Pana-
sonic HFQ is a good choice. However, the 10V/180 μF ca-
pacitor (#ECA-1AFQ181) has an ESR of 0.3
which is not in
the desired range.
To assure a stable design, some of the options are:
1) Use a different type capacitor which has a lower ESR
such as an organic-electrolyte OSCON.
2) Use a higher voltage capacitor. Since ESR is inversely
proportional to the physical size of the capacitor, a higher
voltage capacitor with the same C value will typically have a
lower ESR (because of the larger case size). In this ex-
ample, a Panasonic ECA-1EFQ181 (which is a 180 μF/25V
part) has an ESR of 0.17
and would meet the desired ESR
range.
3) Use a feed-forward capacitor (see next section).
FEED-FORWARD CAPACITOR:
Although not required in
every application, the use of a feed-forward capacitor (C
F
)
can yield improvements in both phase margin and transient
response in most designs.
The added phase margin provided by C
can prevent oscil-
lations in cases where the required value of C
and ESR
can not be easily obtained (see previous section).
C
can also reduce the phase shift due to the pole resulting
from the Gate capacitance, stabilizing applications where
this pole occurs at a low frequency (before cross-over) which
would cause oscillations if left uncompensated (see later
section GATE CAPACITANCE POLE FREQUENCY).
Even in a stable design, adding C
will typically provide more
optimal loop response (faster settling time). For these rea-
sons,
the use of a feed-forward capacitor is always rec-
ommended
.
C
is connected across the top resistor in the divider used to
set the output voltage (see Typical Application Circuit). This
forms a zero in the loop response (defined as
f
zf
), whose fre-
quency is:
f
zf
= 6.6 x 10
6
/ [C
F
x (V
OUT
/ 1.24 1) ]
When solved for C
F
, the f
zf
equation is:
C
F
= 6.6 x 10
6
/ [f
zf
x (V
OUT
/ 1.24 1) ]
For most applications, f
zf
should be set between 5 kHz and
50 kHz.
ADJUSTING THE OUTPUT VOLTAGE
If an output voltage is required which is not available as a
standard voltage, the LP2975 can be used as an adjustable
regulator (see Typical Application circuit). The external resis-
tors R1 and R2 (along with the internal 24 k
resistor) set
the output voltage.
It is important to note that R2 is connected in parallel with the
internal 24 k
resistor. If we define
R
as the total resis-
tance between the COMP pin and ground,
then its value
will be the parallel combination of R2 and 24 k
:
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12
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