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參數資料
| 型號： | LOG112 |
| 元件分類： | 跨阻放大器 |
| 英文描述： | Precision, High-Speed Transimpedance Amplifier |
| 中文描述： | 精密，高速互阻抗放大器 |
| 文件頁數： | 12/18頁 |
| 文件大?。?/td> | 362K |
| 代理商： | LOG112 |
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SBOS291E NOVEMBER 2003 REVISED NOVEMBER 2004
www.ti.com
12
TRANSIMPEDANCE BANDWIDTH AND
NOISE
Limiting the gain set by R
F
can decrease the noise
occurring at the output of the transimpedance circuit.
However, all required gain should occur in the
transimpedance stage, since adding gain after the
transimpedance amplifier generally produces poorer
noise performance. The noise spectral density
produced by R
F
increases with the square-root of R
F
,
whereas the signal increases linearly. Therefore,
signal-to-noise ratio is improved when all the required
gain is placed in the transimpedance stage.
Total noise increases with increased bandwidth. Limit
the circuit bandwidth to only that required. Use a
capacitor, C
F
, across the feedback resistor, R
F
, to limit
bandwidth, even if not required for stability if total output
noise is a concern.
Figure 6a shows the transimpedance circuit without any
feedback capacitor. The resulting transimpedance gain
of this circuit is shown in Figure 7. The –3dB point is
approximately 10MHz. Adding a 16pF feedback
capacitor (Figure 6b) will limit the bandwidth and result
in a –3dB point at approximately 1MHz (seen in
Figure 7). Output noise will be further reduced by
adding a filter (R
FILTER
and C
FILTER
) to create a second
pole (Figure 6c). This second pole is placed within the
feedback loop to maintain the amplifier’s low output
impedance. (If the pole was placed outside the
feedback loop, an additional buffer would be required
and would inadvertently increase noise and dc error).
Using R
DIODE
to represent the equivalent diode
resistance, and C
TOT
for equivalent diode capacitance
plus OPA380 input capacitance, the noise zero, f
Z
, is
calculated by:
f
Z
R
DIODE
R
F
2 R
DIODE
R
F
C
TOT
C
F
OPA380
V
OUT
V
BIAS
R
F
= 10k
(a)
λ
C
STRAY
=0.2pF
C
F
= 16pF
OPA380
V
OUT
V
BIAS
R
F
= 10k
(b)
λ
C
STRAY
=0.2pF
V
OUT
C
= 796pF
R
= 100
C
F
= 21pF
OPA380
V
BIAS
R
F
= 10k
(c)
λ
C
STRAY
= 0.2pF
Figure 6. Transimpedance circuit configurations
with varying total and integrated noise gain
(3)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LOG112AID | 功能描述:對數放大器 Precision Log & Log Ratio Amp RoHS:否 制造商:Texas Instruments 通道數量:3 帶寬:3 dB 共模抑制比（最小值）: 輸入補償電壓:+/- 7 mV 輸入電壓范圍（最大值）:5.5 V 工作電源電壓:4.5 V to 5.5 V 電源電流:+/- 15 mA 工作溫度范圍:- 40 C to +85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-16 封裝:Reel |
| LOG112AID | 制造商:Texas Instruments 功能描述:IC AMP LOG SMD SOIC14 112 |
| LOG112AIDE4 | 功能描述:對數放大器 Precision Log & Log Ratio Amp RoHS:否 制造商:Texas Instruments 通道數量:3 帶寬:3 dB 共模抑制比（最小值）: 輸入補償電壓:+/- 7 mV 輸入電壓范圍（最大值）:5.5 V 工作電源電壓:4.5 V to 5.5 V 電源電流:+/- 15 mA 工作溫度范圍:- 40 C to +85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-16 封裝:Reel |
| LOG112AIDR | 功能描述:對數放大器 Precision Log & Log Ratio Amp RoHS:否 制造商:Texas Instruments 通道數量:3 帶寬:3 dB 共模抑制比（最小值）: 輸入補償電壓:+/- 7 mV 輸入電壓范圍（最大值）:5.5 V 工作電源電壓:4.5 V to 5.5 V 電源電流:+/- 15 mA 工作溫度范圍:- 40 C to +85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-16 封裝:Reel |
| LOG112AIDRE4 | 功能描述:對數放大器 Precision Log & Log Ratio Amp RoHS:否 制造商:Texas Instruments 通道數量:3 帶寬:3 dB 共模抑制比（最小值）: 輸入補償電壓:+/- 7 mV 輸入電壓范圍（最大值）:5.5 V 工作電源電壓:4.5 V to 5.5 V 電源電流:+/- 15 mA 工作溫度范圍:- 40 C to +85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-16 封裝:Reel |
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