參數(shù)資料
型號: LOG104AIDR
廠商: Texas Instruments, Inc.
英文描述: LOGARITHMIC AND LOG RATIO AMPLIFIER
中文描述: 對數(shù)和對數(shù)比率放大器
文件頁數(shù): 5/13頁
文件大小: 273K
代理商: LOG104AIDR
www.ti.com
LOG104
SBOS243B
5
TYPICAL CHARACTERISTICS
(Cont.)
At T
A
= +25
°
C, V
S
=
±
5V, R
L
= 10k
, unless otherwise noted.
17
15
13
11
9
7
5
3
1
1
Input Current (I
1
or
I
2
)
L
LOG CONFORMITY vs INPUT CURRENT
+85
°
C
+75
°
C
40
°
C to +25
°
C
100pA
1nA
10nA
100nA
1
μ
A
10
μ
A
100
μ
A
1mA
LOG CONFORMITY vs TEMPERATURE
L
350
300
250
200
150
100
50
0
40
30
20
10 0
10 20
Temperature (
°
C)
30 40
50 60
70
80
90
7 Decades
(100pA to 1mA)
6 Decades
(1nA to 1mA)
5 Decades
(1nA to 100
μ
A)
8
1
6
3
4
5
V
V+
10
μ
F
LOG104
1000pF
10
μ
F
1000pF
I
1
I
2
V
OUT
C
C
FIGURE 1. Basic Connections of the LOG104.
APPLICATION INFORMATION
The LOG104 is a true logarithmic amplifier that uses the
base-emitter voltage relationship of bipolar transistors to
compute the logarithm, or logarithmic ratio of a current ratio.
Figure 1 shows the basic connections required for operation
of the LOG104. In order to reduce the influence of lead
inductance of power-supply lines, it is recommended that
each supply be bypassed with a 10
μ
F tantalum capacitor in
parallel with a 1000pF ceramic capacitor, as shown in
Figure 1. Connecting the capacitors as close to the LOG104
as possible will contribute to noise reduction as well.
INPUT CURRENT RANGE
To maintain specified accuracy, the input current range of the
LOG104 should be limited from 100pA to 3.5mA. Input currents
outside of this range may compromise LOG104 performance.
Input currents larger than 3.5mA result in increased
nonlinearity. An absolute maximum input current rating of
10mA is included to prevent excessive power dissipation that
may damage the logging transistor.
On
±
5V supplies, the total input current (I
1
+ I
2
) is limited to
4.5mA. Due to compliance issues internal to the LOG104, to
accommodate larger total input currents, supplies should be
increased.
Currents smaller than 100pA will result in increased errors due
the input bias currents of op amps A
1
and A
2
(typically 5pA).
The input bias currents may be compensated for, as shown in
Figure 2. The input stages of the amplifiers have FET inputs,
with input bias current doubling every 10
°
C, which makes the
nulling technique shown practical only where the temperature
is fairly stable.
FIGURE 2. Bias Current Nulling.
V
R
'
> 1M
I
2
I
1
R
2
'
10k
R
1
1M
R
2
10k
V+
8
1
4
6
3
V
OUT
5
V
V+
C
C
LOG104
GND
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