參數(shù)資料
型號(hào): LOG101AID
廠商: TEXAS INSTRUMENTS INC
元件分類: 模擬運(yùn)算功能
英文描述: LOG OR ANTILOG AMPLIFIER, 0.01 MHz BAND WIDTH, PDSO8
封裝: PLASTIC, SOIC-8
文件頁數(shù): 12/16頁
文件大小: 468K
代理商: LOG101AID
www.ti.com
LOG101
5
SBOS242B
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±5V, and RL = 10k, unless otherwise noted.
17
15
13
11
9
7
5
3
1
–1
Input Current (I
1 or I2)
Log
Conformity
(mV)
LOG CONFORMITY vs INPUT CURRENT
+85
°C
+75
°C
–40
°C to +25°C
100pA
1nA
10nA
100nA
1
A10A 100A1mA
LOG CONFORMITY vs TEMPERATURE
Log
Conformity
(m%)
350
300
250
200
150
100
50
0
–40 –30 –20 –10 0
10 20
30 4050 6070 8090
Temperature (
°C)
7 Decades
(100pA to 1mA)
6 Decades
(1nA to 1mA)
5 Decades
(1nA to 100
A)
8
1
6
3
4
5
V–
V+
10
F
LOG101
1000pF
10
F
1000pF
I
1
I
2
V
OUT
C
FIGURE 1. Basic Connections of the LOG101.
APPLICATION INFORMATION
The LOG101 is a true logarithmic amplifier that uses the
base-emitter voltage relationship of bipolar transistors to
compute the logarithm, or logarithmic ratio of a current ratio.
Figure 1 shows the basic connections required for operation
of the LOG101. In order to reduce the influence of lead
inductance of power-supply lines, it is recommended that
each supply be bypassed with a 10
F tantalum capacitor in
parallel with a 1000pF ceramic capacitor, as shown in
Figure 1. Connecting the capacitors as close to the LOG101
as possible will contribute to noise reduction as well.
INPUT CURRENT RANGE
To maintain specified accuracy, the input current range of the
LOG101 should be limited from 100pA to 3.5mA. Input currents
outside of this range may compromise LOG101 performance.
Input currents larger than 3.5mA result in increased
nonlinearity. An absolute maximum input current rating of
10mA is included to prevent excessive power dissipation that
may damage the logging transistor.
On
±5V supplies, the total input current (I
1 + I2) is limited to
4.5mA. Due to compliance issues internal to the LOG101, to
accommodate larger total input currents, supplies should be
increased.
Currents smaller than 100pA will result in increased errors due
to the input bias currents of op amps A1 and A2 (typically 5pA).
The input bias currents may be compensated for, as shown in
Figure 2. The input stages of the amplifiers have FET inputs,
with input bias current doubling every 10
°C, which makes the
nulling technique shown practical only where the temperature
is fairly stable.
FIGURE 2. Bias Current Nulling.
V–
R
1'
> 1M
I
2
I
1
R
2'
10k
R
1
1M
R
2
10k
V+
8
1
4
6
3
V
OUT
5
V–
V+
C
LOG101
GND
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