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參數(shù)資料
| 型號： | LMZ3020-7ERD0A |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 3-OUTPUT 50 W AC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE M02, MODULE |
| 文件頁數(shù)： | 24/24頁 |
| 文件大小： | 982K |
| 代理商： | LMZ3020-7ERD0A |
Cassette Style
AC-DC Converters
M Series
Edition 5/5.2000
9/24
R-Control for Output Voltage Adjustment
Notes: With open R input,
Uo ≈ Uo nom. R excludes option P.
As a standard feature, single output modules offer an
adjustable output voltage identified by letter R in the type
designation.
The output voltage
Uo1 can either be adjusted with an exter-
nal voltage (
Uext) or with an external resistor (R1 or R2). The
adjustment range is approximative 0…110% of
Uo nom. For
output voltages
Uo
> U
o nom, the minimum input voltage ac-
cording to:
Electrical Input Data increases proportionally to
Uo/Uo nom.
Fig. 11
Voltage adjustment with external voltage Uext
a)
Uo
≈ 0...110% U
o nom, using Uext between R (14) and
G (17):
Uo
Uext
Uext ≈ 2.5 V –––––
Uo ≈ Uo nom –––––
Uo nom
2.5 V
Fig. 12
Voltage adjustment with external resistor R1 or R2
b)
Uo
≈ 0...100% U
o nom, using R1 between R (14) and
G (17):
R1
4000
U
o
Uo ≈ Uo nom –––––––––––
R1 ≈ ––––––––––
R1 + 4000
Uo nom - Uo
c)
Uo
≈ U
o nom...Uo max, using R2 between R (14) and
Vo1+ (20):
Uo max = Uo nom + 10%
4000
U
o (Uo nom – 2.5 V)
R2
≈ ––––––––––––––––––––––––
2.5 V (
Uo – Uo nom)
Uo nom 2.5 V R2
Uo ≈ ––––––––––––––––––––––––––––––––
2.5 V (
R2 + 4000 ) – Uo nom 4000
Vo1+
R
+
4000
G
Uref
Uext
–
+
06087
Caution: To prevent damage,
Uext should not exceed
8 V, nor be negative.
Vo1+
R
–
+
G
4000
Uref
R1
R2
06088
Caution: To prevent damage,
R2 should never be less
than 47 k
.
Note: R inputs of n units with paralleled outputs may be
paralleled, too, but if only one external resistor is to be
used, its value should be R1/n, or R2/n respectively.
Auxiliary Functions
i Inhibit for Remote On and Off
Note: With open i input: Output is disabled (
Uo = off).
The outputs of the module may be enabled or disabled by
means of a logic signal (TTL, CMOS, etc.) applied between
the inhibit input i and the negative pin of output 1 (Vo1–). In
systems with several units, this feature can be used, for ex-
ample, to control the activation sequence of the converters.
If the inhibit function is not required, connect the inhibit pin 2
to pin 23 to enable the outputs (active low logic, fail safe).
Vi+
Vi–
Vo–
i
Vo+
Iinh
Uinh
06031
1.6
0.8
0
–0.8
–50
Uinh [V]
Iinh [mA]
–30
0
–10
10
30
50
2.0
1.2
0.4
–0.4
Uinh = 0.8 V
Uo = on
Uo = off
Uinh = 2.4 V
06032
Fig. 9
Definition of inhibit voltage and current
Fig. 10
Typical inhibit current Iinh versus inhibit voltage Uinh
Table 8: Inhibit data
Characteristics
Conditions
min
typ
max
Unit
Uinh
Inhibit input voltage to keep
Uo = on
Ui min...Ui max
–50
0.8
V DC
output voltage
Uo = off
TC min...TC max
2.4
50
I inh
Inhibit current
Uinh = 0
–60
–100
–220
A
For output response refer to
Hold-up Time and Output Re-
sponse.
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