- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄30760 > LMZ10505EXTTZ (NATIONAL SEMICONDUCTOR CORP) 8.7 A SWITCHING REGULATOR, 1160 kHz SWITCHING FREQ-MAX, PSSO7 PDF資料下載
參數(shù)資料
| 型號： | LMZ10505EXTTZ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 8.7 A SWITCHING REGULATOR, 1160 kHz SWITCHING FREQ-MAX, PSSO7 |
| 封裝： | 10.16 X 13.77 MM, 4.57 MM HEIGHT, ROHS COMPLIANT, TO-PMOD, 7 PIN |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 1387K |
| 代理商： | LMZ10505EXTTZ |
Estimate Power Dissipation And
Board Thermal Requirements
Use the current derating curves in the typical performance
characteristics section to obtain an estimate of power loss
(P
IC_LOSS). For the design case of VIN = 5V, VOUT = 2.5V,
I
OUT = 5A, TA(MAX) = 85°C , and TJ(MAX) = 125°C, the device
must see a thermal resistance from case to ambient (
θ
CA) of
less than:
Given the typical thermal resistance from junction to case
(
θ
JC) to be 1.9°C/W (typ.). Continuously operating at a TJ
greater than 125°C will have a shorten life span.
To reach
θ
CA = 27.5°C/W, the PCB is required to dissipate
heat effectively. With no airflow and no external heat, a good
estimate of the required board area covered by 1oz. copper
on both the top and bottom metal layers is:
As a result, approximately 18 square cm of 1oz. copper on
top and bottom layers is required for the PCB design.
The PCB copper heat sink must be connected to the exposed
pad (EP). Approximately thirty six, 10mils (254
μm) thermal
vias spaced 59mils (1.5 mm) apart must connect the top cop-
per to the bottom copper. For an extended discussion and
formulations of thermal rules of thumb, refer to AN-2020. For
an example of a high thermal performance PCB layout with
θ
JA of 20°C/W, refer to the evaluation board application note
AN-2074 and for results of a study of the effects of the PCB
designs, refer to AN-2026.
PC Board Layout Guidelines
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
DC converter and surrounding circuitry by contributing to EMI,
ground bounce and resistive voltage drop in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability. Good layout can be imple-
mented by following a few simple design rules.
30118353
FIGURE 1. High Current Loops
1. Minimize area of switched current loops.
From an EMI reduction standpoint, it is imperative to minimize
the high di/dt current paths. The high current that does not
overlap contains high di/dt, see Figure 1. Therefore physically
place input capacitor (C
in1) as close as possible to the
LMZ10505EXT VIN pin and GND exposed pad to avoid ob-
servable high frequency noise on the output pin. This will
minimize the high di/dt area and reduce radiated EMI. Addi-
tionally, grounding for both the input and output capacitor
should consist of a localized top side plane that connects to
the GND exposed pad (EP).
2. Have a single point ground.
The ground connections for the feedback, soft-start, and en-
able components should be routed only to the GND pin of the
device. This prevents any switched or load currents from
flowing in the analog ground traces. If not properly placed,
poor grounding can result in degraded load regulation or er-
ratic output voltage ripple behavior. Provide the single point
ground connection from pin 4 to EP.
3. Minimize trace length to the FB pin.
Both feedback resistors, R
fbt and Rfbb, and the compensation
components, R
comp and Ccomp, should be located close to the
FB pin. Since the FB node is high impedance, keep the copper
area as small as possible. This is most important as relatively
high value resistors are used to set the output voltage.
4. Make input and output bus connections as wide as
possible.
This reduces any voltage drops on the input or output of the
converter and maximizes efficiency. To optimize voltage ac-
curacy at the load, ensure that a separate feedback voltage
sense trace is made at the load. Doing so will correct for volt-
age drops and provide optimum output accuracy.
5. Provide adequate device heat-sinking.
Use an array of heat-sinking vias to connect the exposed pad
to the ground plane on the bottom PCB layer. If the PCB has
multiple copper layers, thermal vias can also be employed to
make connection to inner layer heat-spreading ground
planes. For best results use a 6 x 6 via array with minimum
via diameter of 10mils (254
μm) thermal vias spaced 59mils
(1.5 mm). Ensure enough copper area is used for heat-sinking
to keep the junction temperature below 125°C.
11
www.national.com
LMZ10505EXT
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMZ14202EXTTZE | SWITCHING REGULATOR, 1000 kHz SWITCHING FREQ-MAX, PSSO7 |
| LNK615GG-TL | SWITCHING REGULATOR, PDIP8 |
| LNK615GG | SWITCHING REGULATOR, PDIP8 |
| LOG100JP | LOG OR ANTILOG AMPLIFIER, 0.045 MHz BAND WIDTH, CDIP14 |
| LOG101AID | LOG OR ANTILOG AMPLIFIER, 0.01 MHz BAND WIDTH, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMZ10505EXTTZ/NOPB | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| LMZ10505EXTTZE | 制造商:Texas Instruments 功能描述:IC, BUCK, SYNC, ADJ, 5A, TO-PMOD-7 制造商:Texas Instruments 功能描述:IC, BUCK, SYNC, ADJ, 5A, TO-PMOD-7; Primary Input Voltage:5.5V; No. of Outputs:1; Output Current:5A; Voltage Regulator Case Style:TO-PMOD; No. of Pins:7; Operating Temperature Min:-55C; Operating Temperature Max:125C; MSL:MSL 3 - ;RoHS Compliant: Yes |
| LMZ10505EXTTZE/NOPB | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| LMZ10505EXTTZX | 制造商:TI 制造商全稱:Texas Instruments 功能描述:5A SIMPLE SWITCHER?? Power Module with 5.5V Maximum Input Voltage for Military and Rugged Applications |
| LMZ10505EXTTZX/NOPB | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。