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7.0 Functional Description
7.1 BASEBAND AND LINK MANAGEMENT
PROCESSORS
Baseband and Lower Link control functions are imple-
mented using a combination of National Semiconductor’s
CompactRISC 16-bit processor and the Bluetooth Lower
Link Controller. These processors operate from integrated
Flash memory and RAM and execute on-board firmware
implementing all Bluetooth functions.
7.1.1 Bluetooth Lower Link Controller
The integrated Bluetooth Lower Link Controller (LLC) com-
plies with the Bluetooth Specification version 1.1 and
implements the following functions:
Support for 1, 3, and 5 slot packet types
79 Channel hop frequency generation circuitry
Fast frequency hopping at 1600 hops per second
Power management control
Access code correlation and slot timing recovery
7.1.2 Bluetooth Upper Layer Stack
The integrated upper layer stack is prequalified and
includes the following protocol layers:
L2CAP
RFComm
SDP
7.1.3 Profile support
The on-chip application of the LMX9820 allows full stand-
alone operation, without any Bluetooth protocol layer nec-
essary outside the module. It supports the Generic Access
Profile (GAP), the Service Discovery Application Profile
(SDAP), and the Serial Port Profile (SPP).
The on-chip profiles can be used as interfaces to additional
profiles executed on the host. The LMX9820 includes a
configurable service database to answer requests with the
profiles supported.
7.1.4 Application with command interface
The module supports automatic slave operation eliminating
the need for an external control unit. The implemented
transparent option enables the chip to handle incoming
data raw, without the need for packaging in a special for-
mat. The device uses a fixed pin to block unallowed con-
nections.
Acting as master, the application offers a simple but versa-
tile command interface for standard Bluetooth operation
like inquiry, service discovery, or serial port connection.
The firmware supports up to three slaves. Default Link Pol-
icy settings and a specific master mode allow optimized
configuration for the application specific requirements. See
also Section "Integrated Firmware" on page 21.
7.2 MEMORY
The LMX9820 includes 256kB of programmable Flash
memory that can be used for code and constant data. It
allows single cycle read access from the CPU. In addition
Figure 9. Transceiver Return Loss
0.0
-0.6
-1.6
-2.6
-3.6
-4.6
-5.6
-6.6
-7.6
-8.6
-9.6
2
2
2
2
2
2
2
2
2
2
2
freq. ghz
2
2
2
2
2
2
2
2
d
m4
freq=2.402GHz
dB(S(1.1))=-8.282
m3
freq=2.441GHz
dB(S(1.1))=-9.313
m3
m4
m5
m5
freq=2.483GHz
dB(S(1.1))=-9.227