參數(shù)資料
型號: LMX393HAUA+T
廠商: Maxim Integrated Products
文件頁數(shù): 8/9頁
文件大小: 0K
描述: IC COMPARATOR GP DUAL 8-UMAX
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 通用
元件數(shù): 2
輸出類型: 開路漏極
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
電壓 - 輸入偏移(最小值): 7mV @ 5V
電流 - 輸入偏壓(最小值): 0.25µA @ 5V
電流 - 輸出(標準): 73mA @ 5V
電流 - 靜態(tài)(最大值): 200µA
CMRR, PSRR(標準): 70dB PSRR
傳輸延遲(最大): 600ns
磁滯: 2mV
工作溫度: -40°C ~ 125°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
LMX331/LMX393/LMX339
General-Purpose, Low-Voltage,
Single/Dual/Quad, Tiny-Pack Comparators
8
_______________________________________________________________________________________
1) Find output voltage when output is high:
VOUT(HIGH) = VDD - ILOAD RL
2) Find the trip points of the comparator using these
formulas:
VTH = VREF + ((VOUT(HIGH) - VREF)R2) / (R1 + R2)
VTL = VREF(1 - (R2 / (R1 + R2)))
where VTH is the threshold voltage at which the com-
parator switches its output from high to low as VIN rises
above the trip point, and VTL is the threshold voltage at
which the comparator switches its output from low to
high as VIN drops below the trip point.
3) The hysteresis band will be:
VHYST = VTH - VTL = VDD(R2 / (R1 + R2))
In this example, let VDD = 5V, VREF = 2.5V, ILOAD =
50nA, RL = 5.1k
Ω:
VOUT(HIGH) = 5.0V - (50 10-9 5.1 103
Ω) ≈ 5.0V
VTH = 2.5V + 2.5V(R2 / (R1 + R2))
VTL = 2.5V(1 - (R2 / (R1 + R2)))
Select R2. In this example, we will choose 1k
Ω.
Select VHYST. In this example, we will choose 50mV.
Solve for R1:
VHYST = VOUT(HIGH)(R2 / (R1 + R2)) V
0.050V = 5(1000 / (R1 + 1000)) V
where R1
≈ 100kΩ, VTH = 2.525V, and VTL = 2.475V.
Choose R1 and R2 to be large enough as not to exceed
the amount of current the reference can supply.
The source current required is VREF / (R1 + R2).
The sink current is (VOUT(HIGH) - VREF) (R1 + R2).
Choose RL to be large enough to avoid drawing excess
current, yet small enough to supply the necessary cur-
rent to drive the load. RL should be between 1k
Ω and
10k
Ω.
Board Layout and Bypassing
Use 0.1F bypass capacitors from VDD to VSS. To max-
imize performance, minimize stray inductance by
putting this capacitor close to the VDD pin and reduc-
ing trace lengths. For slow-moving input signals (rise
time > 1ms), use a 1nF capacitor between IN+ and IN-
to reduce high-frequency noise.
Chip Information
LMX331/LMX331H TRANSISTOR COUNT: 112
LMX393/LMX393H TRANSISTOR COUNT: 211
LMX339/LMX339H TRANSISTOR COUNT: 411
LMX331
R1
R2
IN+
IN-
VDD
VOUT
VSS
VREF
VIN
VDD
OUT
RL
Figure 2. Adding Hysteresis with External Resistors
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
DOCUMENT
NO.
LAND
PATTERN NO.
5 SC70
X5+1
5 SOT23
U5+2
8 SOT23
K8F+4
8 MAX
U8+1
14 TSSOP
U16M+1
14 SOIC
S8+4
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