參數(shù)資料
型號(hào): LMX2532LQX0967
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Frequency Synthesizer System with Integrated VCOs
中文描述: PLL FREQUENCY SYNTHESIZER, 19.68 MHz, QCC28
封裝: 5 X 5 MM, 0.75 MM HEIGHT, LLP-28
文件頁數(shù): 9/18頁
文件大?。?/td> 189K
代理商: LMX2532LQX0967
Functional Description
(Continued)
MICROWIRE INTERFACE
The programmable register set is accessed via the
MICROWIRE serial interface. The interface comprises three
signal pins: CLK, DATA, and LE. Serial data (DATA) is
clocked into the 24-bit shift register on the rising edge of the
clock (CLK). The last bits decode the internal control register
address. When the Latch Enable (LE) transitions from LOW
to HIGH, data stored in the shift registers is loaded into the
corresponding control register.
20067206
FIGURE 2. Lock Detect Flow Diagram
L
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