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參數(shù)資料
| 型號： | LMX2532LQ1065 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum Frequency Synthesizer System with Integrated VCOs |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 19.68 MHz, QCC28 |
| 封裝： | 5 X 5 MM, 0.75 MM HEIGHT, LLP-28 |
| 文件頁數(shù)： | 11/18頁 |
| 文件大?。?/td> | 189K |
| 代理商： | LMX2532LQ1065 |
Programming Description
(Continued)
R0 REGISTER
The R0 register address bits (R0 [1:0]) are “00”.
The SPI_DEF bit selects between using the default IF counter values and user programmable values. The use of the default
counter values requires that only words R0 to R3 (registers R3, loaded first, to R0, loaded last) be sent after initial power up.
The RF_LD bit activates the lock detect output of the LD pin (pin 19). The lock detect mode shows the lock status of the RF PLL.
The waveform of the lock detect mode is shown in
Figure 1
, in the
Functional Description
section on
LOCK DETECT
.
The SPUR_CRL bit is set to 1 only in the GPS mode with the LMX2532LQ1065 when a 19.68 MHz reference oscillator is used.
The RF N counter consists of the 4-bit programmable counter (RF_B counter), the 3-bit swallow counter (RF_A counter) and the
11-bit delta sigma modulator (RF_FN counter). The equations for calculating the counter values are presented below.
R0 REGISTER
R
MSB
23
SHIFT REGISTER BIT LOCATION
17
16
15
14
Data Field
LSB
0
22
21
20
19
18
13
12
11
10
9
8
7
6
5
4
3
2
1
Address
Field
0
0
R0
(Default)
SPI_
DEF
RF_
SEL
RF_
LD
SP
UR_
CRL
RF_B
[3:0]
RF_A
[2:0]
RF_FN
[10:0]
Name
SPI_DEF
Functions
Default Register Selection
0 = OFF (Use values set in R0 to R6)
1 = ON (Use default values set in R0 to R3)
RF Select Configuration
See
Table 8
. RF_SEL Configuration below
RF Lock Detect
0 = Hard zero (GND)
1 = Lock detect
Spur Control
1 = LMX2532LQ1065 in GPS mode with 19.68 MHz reference oscillator only
0 = All other options
RF_B Counter
4-bit programmable counter
2
≤
RF_B
≤
15
RF_A Counter
3-bit swallow counter
0
≤
RF_A
≤
7 for LMX2522
0
≤
RF_A
≤
5 for LMX2532
RF Fractional Numerator Counter
11-bit programmable counter
0
≤
RF_FN
<
1920 for f
OSC
= 19.20 MHz
0
≤
RF_FN
<
1968 for f
OSC
= 19.68 MHz
RF_SEL
RF_LD
SPUR_CRL
RF_B [3:0]
RF_A [2:0]
RF_FN [10:0]
TABLE 8. RF_SEL Configuration
Device Type
LMX2522
LMX2532
RF_SEL = 0
GPS
K-Cellular
RF_SEL = 1
K-PCS
GPS
L
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| LMX2532LQ1065/NOPB | 功能描述:IC FREQ SYNTH DUAL W/VCO 28LLP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:PLLatinum™ 標準包裝:100 系列:* |
| LMX2532LQX0967 | 功能描述:IC SYNTHESIZER PLL VCO GPS 28LLP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:PLLatinum™ 標準包裝:100 系列:* |
| LMX2532LQX1065 | 功能描述:IC SYNTHESIZER PLL VCO GPS 28LLP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:PLLatinum™ 標準包裝:100 系列:* |
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| LMX25412060EVAL | 功能描述:時鐘和定時器開發(fā)工具 LMX25412060 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
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