參數(shù)資料
型號(hào): LMX2531LQ1700E
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum High Performance Frequency Synthesizer System with Integrated VCO
中文描述: PLL FREQUENCY SYNTHESIZER, 80 MHz, QCC36
封裝: 6 X 6 MM, 0.80 MM HEIGHT, LEAD FREE, LLP-36
文件頁(yè)數(shù): 4/25頁(yè)
文件大?。?/td> 589K
代理商: LMX2531LQ1700E
Connection Diagram
20101111
Pin(s)
VccDIG
VccVCO
VccBUF
VccPLL
VregDIG
Application Information
Because the LMX2531 contains internal regulators, the power supply noise rejection is very good and
capacitors at this pin are not critical. If desired, capacitors can be placed at these pins to improve the noise
rejection. Recommended values are from open to 1 μF.
There is not really any reason to use any other values than the recommended values.
If the VregVCO capacitor is changed, it is recommended to keep this capacitor between 1/100 and 1/1000 of
the value of the VregVCO capacitor.
Because this pin is the output of a regulator, there are be stability concerns if there is not sufficient series
resistance. For ceramic capacitors the ESR (Equivalent Series Resistance) is too low, and it recommended
that a series resistance of 1 - 3.3
is necessary. If there is insufficient ESR, then there may be degradation in
the phase noise, especially in the 100 - 300 kHz offset. Recommended values are from 1 μF to 10 μF.
The choice of the capacitor value at this pin involves a trade-off between integer spurs and phase noise in the
100 - 300 kHz offset range. If too much series resistance is at this pin, the spurs at far offset will be severely
degraded. If there is too little, the phase noise may be degraded. A 470 nF capacitor in series with 220 m
provides optimal spurs with a minimal degradation in phase noise, although these optimal values may be
design specific.
Since the maximum voltage on these pins is less than the minimum Vcc voltage, level shifting may be
required, if the output voltage of the microcontroller is too high. This can be accomplished with a resistive
divider.
As with the CLK, DATA, and LE pins, level shifting may be required if the output voltage of the microcontroller
is too high. A resistive divider is or a series diode are two ways to accomplish this. The diode has the
advantage that no current flows through it when the chip is powered down.
It is an option to use the lock detect information from this pin.
This is the high frequency output. This needs to be AC coupled, and matching may also be required. The
value of the DC blocking capacitor may be changed, depending on the output frequency.
In most cases, it is sufficient to short these together. C1_LF, C2_LF, and R2_LF are used in conjunction with
the internal loop filter to make a fourth order loop filter. However, the user always has the option of adding
additional poles.
This is the fastlock resistor, which can be useful in many cases, since the spurs are often better with low
charge pump currents, and the internal loop filter can be adjusted during fastlock.
This is the crystal oscillator input pin. It needs to be AC coupled.
If the device is being driven single-ended, this pin needs to be shunted to ground with a capacitor.
VrefVCO
VregVCO
VregPLL1
VregPLL2
CLK
DATA
LE
CE
Ftest/LD
Fout
CPout
Vtune
R2pLF
OSCin
OSCin*
L
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