參數(shù)資料
型號(hào): LMX2505LQ1321
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinu Dual Frequency Synthesizer System with Integrated VCOs
中文描述: PLL FREQUENCY SYNTHESIZER, 26 MHz, QCC28
封裝: 5 X 5 MM, 0.75 MM HEIGHT, LLP-28
文件頁(yè)數(shù): 5/16頁(yè)
文件大?。?/td> 231K
代理商: LMX2505LQ1321
Electrical Characteristics
(V
IN
= 2.8 V, refer to Typical Application Circuit; Limits in standard typeface are for
T
A
= 25 C; Limits in
boldface
type apply over the operating temperature range from -20 C
T
A
75 C unless otherwise
noted.) (Continued)
Symbol
RF1 VCO for PDC1500
L(f)
RF1out
Phase Noise when RF1 VCO for
PDC1500 is activated in Normal
Mode.
Parameter
Condition
Min
Typ
Max
Units
@
25 kHz offset
-95
-93
-91
-103
-101
-113
-111
-135
-133
-25
-20
-45
-60
-69
-75
dBc/Hz
@
50 kHz offset
-106
dBc/Hz
@
100 kHz offset
-115
dBc/Hz
@
1 MHz offset
dBc/Hz
2nd Harmonic Suppression
3rd Harmonic Suppression
Spurious Tones
dBc
dBc
dBc
dBc
dBc
dBc
@
25 kHz offset
@
25 kHz
<
offset
50 kHz
@
50 kHz
<
offset
100 kHz
@
offset
>
100 kHz
RF2 VCO for PDC800
f
RF2out
P
RF2out
Frequency Range (Note 8)
Output Power
RF2 VCO for PDC800
OB_CRL [1:0] = 11
OB_CRL [1:0] = 10
OB_CRL [1:0] = 01
OB_CRL [1:0] = 00
Full frequency span within
each band in High Speed
Mode.
Between bands High Speed
Mode.
Full frequency span within
each band in Normal Mode.
633.15
-6
-9
-11
-15
768
0
-3
-5
-9
300
MHz
dBm
dBm
dBm
dBm
μs
-3
-6
-8
-12
Lock Time
(Note 9)
300
(Note 9)
500
(Note 9)
375
(Note 10)
500
(Note 9)
400
(Note 10)
μs
μs
μs
Between bands in Normal
Mode.
μs
μs
RMS Phase Error
Phase Noise when RF2 VCO for
PDC800 is activated in Normal Mode.
1.3
-95
degrees
dBc/Hz
L(f)
RF2out
@
25 kHz offset
-93
-91
-103
-101
-113
-111
-135
-133
-25
-20
-45
-60
-69
-75
@
50 kHz offset
-106
dBc/Hz
@
100 kHz offset
-115
dBc/Hz
@
1 MHz offset
dBc/Hz
2nd Harmonic Suppression
3rd Harmonic Suppression
Spurious Tones
dBc
dBc
dBc
dBc
dBc
dBc
@
25 kHz offset
@
25 kHz
<
offset
50 kHz
@
50 kHz
<
offset
100 kHz
@
offset
>
100 kHz
L
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