參數(shù)資料
型號: LMX2505
廠商: National Semiconductor Corporation
英文描述: PLLatinu Dual Frequency Synthesizer System with Integrated VCOs
中文描述: PLLatinu雙頻率合成系統(tǒng)的集成和VCO
文件頁數(shù): 6/16頁
文件大?。?/td> 231K
代理商: LMX2505
Electrical Characteristics
(V
IN
= 2.8 V, refer to Typical Application Circuit; Limits in standard typeface are for
T
A
= 25 C; Limits in
boldface
type apply over the operating temperature range from -20 C
T
A
75 C unless otherwise
noted.) (Continued)
Symbol
DIGITAL INTERFACE (DATA, CLK, LE, LD, CE, BS)
V
IH
High-Level Input Voltage
Parameter
Condition
Min
Typ
Max
Units
0.8 V
CC
0.8 V
DD
-0.3
-0.3
-10
-10
V
CC
V
DD
0.2 V
CC
0.2 V
DD
10
10
V
V
V
V
μA
μA
pF
ns
V
V
V
pF
V
IL
Low-Level Input Voltage
I
IH
I
IL
High-Level Input Current
Low-Level Input Current
Input Capacitance
Rise/Fall Time
High-Level Output Voltage
3
30
V
OH
V
CC
- 0.4
V
DD
- 0.4
V
OL
Low-Level Output Voltage
Output Capacitance
MICROWIRE INTERFACE TIMING
t
CS
Data to Clock Set Up Time
t
CH
Data to Clock Hold Time
t
CWH
Clock Pulse Width HIGH
t
CWL
Clock Pulse Width LOW
t
ES
Clock to Latch Enable Set Up Time
t
EW
Latch Enable Pulse Width
0.4
5
50
10
50
50
50
50
ns
ns
ns
ns
ns
ns
Note 5:
RF PLL and VCO in PDC800 mode.
Note 6:
RF PLL and VCO in PDC1500 mode.
Note 7:
The reference frequency must also be programmed using the OSC_FREQ control bit. For other reference frequencies, please contact National
Semiconductor.
Note 8:
For other frequency ranges, please contact National Semiconductor.
Note 9:
Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-1 kHz
of the final frequency.
Note 10:
Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-3 kHz
of the final frequency.
Note 11:
All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with T
= 25 C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Microwire Interface Timing Diagram
20067101
L
www.national.com
6
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