參數(shù)資料
型號(hào): LMX2430TMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁(yè)數(shù): 39/49頁(yè)
文件大?。?/td> 943K
代理商: LMX2430TMX
2.0 Programming Description
(Continued)
2.4 R0 REGISTER
The R0 register contains the RF_R, RF_CPP, RF_CPG, RF_CPT, and RF_RST control words, in addition to two of the four bits
that compose the MUX control word. The detailed descriptions and programming information for each control word is discussed
in the following sections.
Reg
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[20:0] FIELD
ADDRESS
[2:0]
FIELD
R0
MUX[3:2]
RF_
RST
RF_
CPT
RF_
CPG
RF_
CPP
RF_R[14:0]
0
0
0
2.4.1 RF_R[14:0] - RF Synthesizer Programmable Reference Divider (R Counter) (R0[17:3])
The RF reference divider (RF_R) can be programmed to support divide ratios from 3 to 32767. Divide ratios less than 3 are
prohibited.
Divide Ratio
RF_R[14:0]
7
0
0
1
14
0
0
1
13
0
0
1
12
0
0
1
11
0
0
1
10
0
0
1
9
0
0
1
8
0
0
1
6
0
0
1
5
0
0
1
4
0
0
1
3
0
0
1
2
0
1
1
1
1
0
1
0
1
0
1
3
4
32767
2.4.2 RF_CPP - RF Synthesizer Phase Detector Polarity (R0[18])
The RF_CPP bit is used to control the RF synthesizer’s phase/ frequency detector polarity based on the VCO tuning
characteristics.
Control Bit
Register Location
Description
Function
0
1
RF_CPP
R0[18]
RF Phase/
Frequency Detector
Polarity
RF VCO Negative
Tuning
Characteristics
RF VCO Positive
Tuning
Characteristics
RF VCO Characteristics
20053567
L
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