參數(shù)資料
型號: LMX2331LSLB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 2000 MHz, QCC24
封裝: CSP-24
文件頁數(shù): 13/21頁
文件大?。?/td> 496K
代理商: LMX2331LSLB
Functional Description
(Continued)
PROGRAMMABLE DIVIDER (N COUNTER)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control
Bits are 10 or 11 (10 for IF counter and 11 for RF counter) data is transferred from the 22-bit shift register into a 4-bit or 7-bit latch
(which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data
format is shown below.
For the IF N counter bits 5, 6, and 7 are don’t care bits.
The RF N counter does not have don’t care
bits.
7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER)
RF
Divide
Ratio
A
0
1
127
N
7
N
6
N
5
N
4
N
3
N
2
N
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
Notes:
Divide ratio: 0 to 127
B
A
IF
Divide
Ratio
A
0
1
15
N
7
N
6
N
5
N
4
N
3
N
2
N
1
X
X
X
X
X
X
X
X
X
0
0
1
0
0
1
0
0
1
0
1
1
X = DON’T CARE condition
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER)
Divide
Ratio
B
3
4
2047
N
18
N
17
N
16
N
15
N
14
N
13
N
12
N
11
N
10
N
9
N
8
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
1
0
1
1
0
1
Note:
Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited)
B
A
PULSE SWALLOW FUNCTION
f
VCO
= [(P x B) + A] x f
OSC
/R
f
VCO
:
Output frequency of external voltage controlled oscillator (VCO)
B:
Preset divide ratio of binary 11-bit programmable counter (3 to 2047)
A:
Preset divide ratio of binary 7-bit swallow counter
(0
A
127 {RF}, 0
A
15 {IF}, A
B)
f
OSC
:
Output frequency of the external reference frequency oscillator
R:
Preset divide ratio of binary 15-bit programmable reference counter (3 to 32767)
P:
Preset modulus of dual moduIus prescaler (for
IF
; P = 8 or 16;
for
RF
; LMX2330L: P = 32 or 64
LMX2331L/32L: P = 64 or 128)
DS012806-8
www.national.com
13
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