參數資料
型號: LMX2315
廠商: National Semiconductor Corporation
英文描述: Frequency Synthesizer for RF Personal Communications
中文描述: 頻率合成射頻個人通信
文件頁數: 10/22頁
文件大?。?/td> 409K
代理商: LMX2315
Functional Description
The simplified block diagram below shows the 19-bit data register, the 14-bit R Counter and the S Latch, and the 18-bit
N Counter (intermediate latches are not shown). The data stream is clocked (on the rising edge) into the DATA input, MSB first.
If the Control Bit (last bit input) is HIGH, the DATA is transferred into the R Counter (programmable reference divider) and the
S Latch (prescaler select: LMX2315 and LMX2320: 64/65 or 128/129; LMX2325 32/33 or 64/65). If the Control Bit (LSB) is
LOW, the DATA is transferred into the N Counter (programmable divider).
TL/W/12339–18
PROGRAMMABLE REFERENCE DIVIDER (R COUNTER) AND PRESCALER SELECT (S LATCH)
If the Control Bit (last bit shifted into the Data Register) is HIGH, data is transferred from the 19-bit shift register into a 14-bit
latch (which sets the 14-bit R Counter) and the 1-bit S Latch (S15, which sets the prescaler: 64/65 or 128/129 for the
LMX2315/20 or 32/33 or 64/65 for the LMX2325). Serial data format is shown below.
TL/W/12339–6
14-BIT PROGRAMMABLE REFERENCE DIVIDER RATIO
(R COUNTER)
Divide
Ratio
R
14
S
13
S
12
S
11
S
10
S
S
9
S
8
S
7
S
6
S
5
S
4
S
3
S
2
S
1
3
0
0
0
0
0
0
0
0
0
0
0
0
1
1
4
#
0
#
0
#
0
#
0
#
0
#
0
#
0
#
0
#
0
#
0
#
0
#
1
#
0
#
0
#
16383
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Notes:
Divide ratios less than 3 are prohibited.
Divide ratio: 3 to 16383
S1 to S14: These bits select the divide ratio of the programmable
reference divider.
C: Control bit (set to HIGH level to load R counter and S Latch)
Data is shifted in MSB first.
Prescaler Select
15
S
LMX2315/20
LMX2325
128/129
64/65
0
64/65
32/33
1
http://www.national.com
10
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