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參數(shù)資料
| 型號： | LMV921M7X |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)算放大器 |
| 英文描述： | 1.8V, 1MHz, Low Power Operational Amplifiers with Rail-To-Rail Input and Output |
| 中文描述： | OP-AMP, 6000 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDSO5 |
| 封裝： | SC-70, 5 PIN |
| 文件頁數(shù)： | 15/27頁 |
| 文件大?。?/td> | 736K |
| 代理商： | LMV921M7X |
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Application Note
1.0 Unity Gain Pulse Response Considerations
The unity-gain follower is the most sensitive configuration to
capacitive loading. The LMV921/LMV922/LMV924 family
can directly drive 1nF in a unity-gain with minimal ringing. Di-
rect capacitive loading reduces the phase margin of the am-
plifier. The combination of the amplifier’s output impedance
and the capacitive load induces phase lag. This results in ei-
ther an underdamped pulse response or oscillation. The
pulse response can be improved by adding a pull up resistor
as shown in Figure 1
Higher capacitances can be driven by decreasing the value
of the pull-up resistor, but its value shouldn’t be reduced be-
yond the sinking capability of the part. An alternate approach
is to use an isolation resistor as illustrated in Figure 2
2.0 Input Bias Current Consideration
The LMV921/LMV922/LMV924 family has a bipolar input
stage. The typical input bias current (I
) is 12nA. The input
bias current can develop a significant offset voltage. This off-
set is primarily due to I
flowing through the negative feed-
back resistor, R
. For example, if I
is 50nA (max room) and
R
F
is 100k
, then an offset voltage of 5mV will develop (V
= I
X R
). Using a compensation resistor (R
), as shown in
Figure 3 cancels this affect. But the input offset current (I
)
will still contribute to an offset voltage in the same manner.
3.0 Operating Supply Voltage
The LMV921/LMV922/LMV924 family is guaranteed to oper-
ate from 1.8V to 5.0V. They will begin to function at power
voltages as low as 1.2V at room temperature when un-
loaded. Start up voltage increases to 1.5V when the amplifier
is fully loaded (600
to mid-supply). Below 1.2V the output
voltage is not guaranteed to follow the input. Figure 4 below
shows the output voltage vs. supply voltage with the
LMV921/LMV922/LMV924 configured as a voltage follower
at room temperature.
4.0 Input and Output Stage
The rail-to-rail input stage of this family provides more flex-
ibility for the designer. The LMV921/LMV922/LMV924 use a
complimentary PNP and NPN input stage in which the PNP
stage senses common mode voltage near V
and the NPN
stage senses common mode voltage near V
+
. The transition
from the PNP stage to NPN stage occurs 1V below V
+
. Since
both input stages have their own offset voltage, the offset of
the amplifier becomes a function of the input common mode
voltage and has a crossover point at 1V below V
+
as shown
in the V
OS
vs. V
CM
curves.
DS100979-41
FIGURE 1. Using a Pull-Up Resistor at the Output for
Stabilizing Capacitive Loads
DS100979-43
FIGURE 2. Using an Isolation Resistor to Drive Heavy
Capacitive Loads
DS100979-59
FIGURE 3. Canceling the Voltage Offset Effect of Input
Bias Current
DS100979-D2
FIGURE 4.
L
www.national.com
15
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMV922 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:1.8V, 1MHz, Low Power Operational Amplifiers with Rail-To-Rail Input and Output |
| LMV922A WAF | 制造商:Texas Instruments 功能描述: |
| LMV922M | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:OC White Company 功能描述:OP Amp Dual GP R-R I/O 5V 8-Pin SOIC N Rail |
| LMV922MM | 制造商:Texas Instruments 功能描述: |
| LMV922MMX | 功能描述:IC OP AMP LO PWR RRIO 8-MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
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