參數(shù)資料
型號(hào): LMV822MX/NOPB
廠商: National Semiconductor
文件頁(yè)數(shù): 6/38頁(yè)
文件大?。?/td> 0K
描述: IC OP AMP RAIL/RAIL 8-SOIC
標(biāo)準(zhǔn)包裝: 1
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 2 V/µs
增益帶寬積: 5.6MHz
電流 - 輸入偏壓: 100nA
電壓 - 輸入偏移: 3500µV
電流 - 電源: 500µA
電流 - 輸出 / 通道: 45mA
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 1269 (CN2011-ZH PDF)
其它名稱: LMV822MXDKR
SNOS032G – AUGUST 1999 – REVISED NOVEMBER 2013
APPLICATION NOTE
This application note is divided into two sections: design considerations and Application Circuits.
DESIGN CONSIDERATIONS
This section covers the following design considerations:
1. Frequency and Phase Response Considerations
2. Unity-Gain Pulse Response Considerations
3. Input Bias Current Considerations
FREQUENCY AND PHASE RESPONSE CONSIDERATIONS
The relationship between open-loop frequency response and open-loop phase response determines the closed-
loop stability performance (negative feedback). The open-loop phase response causes the feedback signal to
shift towards becoming positive feedback, thus becoming unstable. The further the output phase angle is from
the input phase angle, the more stable the negative feedback will operate. Phase Margin (
φm) specifies this
output-to-input phase relationship at the unity-gain crossover point. Zero degrees of phase-margin means that
the input and output are completely in phase with each other and will sustain oscillation at the unity-gain
frequency.
The AC tables show
φm for a no load condition. But φm changes with load. The Gain and Phase margin vs
Frequency plots in the curve section can be used to graphically determine the
φm for various loaded conditions.
To do this, examine the phase angle portion of the plot, find the phase margin point at the unity-gain frequency,
and determine how far this point is from zero degree of phase-margin. The larger the phase-margin, the more
stable the circuit operation.
The bandwidth is also affected by load. The graphs of Figure 32 and Figure 33 provide a quick look at how
various loads affect the
φm and the bandwidth of the LMV821/822/824 family. These graphs show capacitive
loads reducing both
φm and bandwidth, while resistive loads reduce the bandwidth but increase the φm. Notice
how a 600
resistor can be added in parallel with 220 picofarads capacitance, to increase the φm 20°(approx.),
but at the price of about a 100 kHz of bandwidth.
Overall, the LMV821/822/824 family provides good stability for loaded condition.
Figure 32. Phase Margin vs Common Mode Voltage for Various Loads
14
Copyright 1999–2013, Texas Instruments Incorporated
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