參數(shù)資料
型號(hào): LMS485EINA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Power RS-485 / RS-422 Differential Bus Transceiver
中文描述: LINE TRANSCEIVER, DIP8
封裝: DIP-8
文件頁(yè)數(shù): 5/13頁(yè)
文件大?。?/td> 248K
代理商: LMS485EINA
Electrical Characteristics
(Continued)
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol
V
OL
Parameter
Conditions
Min
Typ
Max
0.4
Units
V
CMOS Low-level Output
Voltage
Tristate Output Leakage
Current
Input Resistance
Power Supply Current
I
CC
Supply Current
I
OL
= 4 mA, V
ID
= 200 mV
I
OZR
0.4V
V
O
+ 2.4V
±
1
μA
R
IN
7V
V
CM
+12V
12
k
DE = V
CC,
RE = GND or V
CC
DE = 0V, RE = GND or V
CC
V
O
= high, 7V
V
CM
+12V
400
360
800
560
250
μA
I
OSD1
Driver Short-circuit Output
Current
Driver Short-circuit Output
Current
Receiver Short-circuit Output
Current
Switching Characteristics
Driver
T
PLH
,
T
PHL
Output
T
SKEW
Driver Output Skew
T
R
,
T
F
T
ZH
,
T
ZL
Time
T
HZ
,
T
LZ
Receiver
T
PLH
,
T
PHL
Output
T
SKEW
Receiver Output Skew
T
ZH
,
T
ZL
T
HZ
,
T
LZ
F
MAX
Maximum Data Rate
mA
I
OSD2
V
O
= low, 7V
V
CM
+12V
250
mA
I
OSR
0 V
V
O
V
CC
95
mA
Propagation Delay Input to
R
L
= 54
, C
L
= 100 pF
10
40
80
ns
R
L
= 54
, C
L
= 100 pF
R
L
= 54
, C
L
= 100 pF
5
10
10
40
ns
ns
Driver Rise and Fall Time
3
Driver Enable to Ouput Valid
C
L
= 100 pF
25
70
ns
Driver Output Disable Time
C
L
= 15 pF
35
70
ns
Propagation Delay Input to
R
L
= 54
, C
L
= 100 pF
20
90
200
ns
R
L
= 54
, C
L
= 100 pF
C
L
= 15 pF
5
20
ns
ns
Receiver Enable Time
50
Receiver Disable Time
C
L
= 15 pF
20
50
ns
2.5
Mbps
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2:
All voltage values, except differential I/O bus voltage, are with respect to the network ground terminal.
Note 3:
The maximum power dissipation is a function of T
,
θ
, and T
. The maximum allowable power dissipation at any ambient temperature, T
A
, is
P
D
= (T
J(MAX)
- T
A
)/
θ
JA
. All numbers apply for packages soldered directly into a PC board.
Note 4:
ESD rating based upon human body model, 100 pF discharged through 1.5 k
.
Note 5:
Voltage limits apply to DI, DE, RE pins.
Note 6:
Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B.
Note 7:
|
V
OD
| and |
V
OC
| are changes in magnitude of V
OD
and V
OC
, respectively when the input changes from high to low levels.
Note 8:
Peak current
L
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