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參數(shù)資料
| 型號： | LMS1487IMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 5V Low Power RS-485 / RS-422 Differential Bus Transceiver |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大小： | 249K |
| 代理商： | LMS1487IMX |
Electrical Characteristics
(Continued)
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol
V
OH
Parameter
Conditions
Min
3.5
Typ
Max
Units
V
CMOS High-level Output
Voltage
CMOS Low-level
Tristate Output Leakage
Current
Input Resistance
Power Supply Current
I
CC
Supply Current
I
OH
= 4mA, V
ID
= 200mV
V
OL
I
OZR
I
OL
= 4mA, V
ID
= 200mV
0.4V
≤
V
O
≤
+ 2.4V
0.40
±
1
V
μA
R
IN
7V
≤
V
CM
≤
+12V
48
k
DE = V
CC,
RE = GND or V
CC
DE = 0V, RE = GND or V
CC
V
O
= high, 7V
≤
V
CM
≤
+ 12V
(Note 8)
V
O
= low, 7V
≤
V
CM
≤
+ 12V
(Note 8)
0 V
≤
V
O
≤
V
CC
320
315
500
400
250
μA
I
OSD1
Driver Short-circuit Output
Current
Driver Short-circuit Output
Current
Receiver Short-circuit Output
Current
Switching Characteristics
Driver
T
PLH
,
T
PHL
Output
T
SKEW
Driver Output Skew
35
mA
I
OSD2
35
250
mA
I
OSR
7
95
mA
Propagation Delay Input to
R
L
= 54
, C
L
= 100pF
(
Figure 3
,
Figure 7
)
R
L
= 54
, C
L
= 100 pF
(
Figure 3
,
Figure 7
)
R
L
= 54
, C
L
= 100 pF
(
Figure 3
,
Figure 7
)
C
L
= 100 pF, R
L
= 500
(
Figure 4
,
Figure 8
)
C
L
= 15 pF, R
L
= 500
(
Figure 4
,
Figure 8
)
10
35
60
nS
5
10
nS
T
R
,
T
F
T
ZH
,
T
ZL
T
HZ
,
T
LZ
Receiver
T
PLH
,
T
PHL
T
SKEW
Driver Rise and Fall Time
3
8
40
nS
Driver Enable to Ouput Valid
Time
Driver Output Disable Time
25
70
nS
30
70
nS
Propagation Delay Input to
Output
Receiver Output Skew
R
L
= 54
, C
L
= 100 pF
(
Figure 5
,
Figure 7
)
R
L
= 54
, C
L
= 100 pF
(
Figure 5
,
Figure 7
)
C
L
= 15 pF, R
L
= 1 k
(
Figure 6
,
Figure 10
)
20
50
200
nS
5
nS
T
ZH
,
T
ZL
Receiver Enable Time
20
50
nS
Receiver Disable Time
Maximum Data Rate
20
50
nS
Mbps
F
MAX
2.5
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Note 2:
All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
Note 3:
The maximum power dissipation is a function of T
,
θ
, and T
. The maximum allowable power dissipation at any ambient temperature is P
D
=
(T
J(MAX)
- T
A
)/
θ
JA
. All numbers apply for packages soldered directly into a PC board.
Note 4:
ESD rating based upon human body model, 100pF discharged through 1.5k
.
Note 5:
Voltage limits apply to DI, DE, RE pins.
Note 6:
Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B.
Note 7:
|
V
OD
| and |
V
OC
| are changes in magnitude of V
OD
and V
OC
, respectively when the input changes from high to low levels.
Note 8:
Peak current
L
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