![](http://datasheet.mmic.net.cn/National-Semiconductor/LMH6734MQX-NOPB_datasheet_105341/LMH6734MQX-NOPB_12.png)
VOUT
+
-
VIN
+ VSUPPLY
CPOS
6.8 PF
0.1 PF
6.8 PF
CNEG
0.1 PF
RIN
- VSUPPLY
OBSOLETE
SNOSAY0C – JUNE 2007 – REVISED APRIL 2013
APPLICATION INFORMATION
GENERAL INFORMATION
The LMH6734 is a high speed current feedback selectable gain buffer (SGB), optimized for very high speed
applications. With its internal feedback and gain-setting resistors, RF = RG = 327, the LMH6734 offers excellent
AC performance while simplifying board layout and minimizing the effects of layout related parasitic components.
The LMH6734 has no internal ground reference so single or split supply configurations are both equally useful.
SETTING THE CLOSED LOOP GAIN
The LMH6734 can be configured with gain settings of AV = +2, +1, or 1. Table 1 shows the non-inverting and inverting pin connections to achieve the desired closed loop gain.
Table 1. Setting the Closed Loop Gain
INPUT CONNECTIONS
GAIN AV
Non-Inverting
Inverting
1 V/V
Ground
Input Signal
+1 V/V
Input Signal
NC (Open)
+2 V/V
Input Signal
Ground
SPLIT SUPPLY APPLICATION
configurations the input signal is DC coupled with a termination resister input RIN = 50. In Figure 35 the inverting input is connected to ground completing the internal feedback loop to set the gain to +2 V/V. In
Figure 36 the inverting input is open (no-connect), thus providing a buffer configuration of +1 V/V.
Figure 37 shows a buffer configuration with a gain of
1 V/V. In this configuration an input resistor of 59 was used to
balance the internal RG resistor of 327 and to provide a 50 termination.
Figure 35. Recommended Split Supply Non-Inverting Gain Circuit, Gain = +2 V/V
12
Copyright 2007–2013, Texas Instruments Incorporated