參數(shù)資料
型號： LMH6704MF
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 音頻／視頻放大
英文描述： 650 MHz Progammable Gain Buffer with Disable
中文描述： 1 CHANNEL, VIDEO AMPLIFIER, PDSO6
封裝： SOT23, 6-PIN
文件頁數(shù)： 2/12頁
文件大小： 774K
代理商： LMH6704MF
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
I
OUT
Common-Mode Input Voltage
Maximum Junction Temperature
Storage Temperature Range
Soldering Information
Infrared or Convection (20 sec.)
Wave Soldering (10 sec.)
Lead Temp. (soldering 10 sec.)
13.5V
(Note 3)
V
S
to V
S+
150C
65C to 150C
235C
260C
300C
ESD Tolerance (Note 4)
Human Body Model
Machine Model
2000V
200V
Operating Ratings
(Note 1)
Nominal Supply Voltage
Operating Temperature
Thermal Resistance
Package
8-Pin SOIC
6-Pin SOT23
±
4V to
±
6V
40C to 85C
(
θ
JC
)
75C/W
120C/W
(
θ
JA
)
160C/W
187C/W
Electrical Characteristics
(Note 2)
T
A
= +25C , A
V
= +2, V
S
=
±
5V, R
L
= 100
; unless specified.
Symbol
Parameter
Conditions
Min
(Note 6)
Typ
(Note 6)
Max
(Note 6)
Units
Dynamic Performance
SSBW
SSBW
LSBW
GF
0.1dB
SR
TRS/TRL
-3 dB Bandwidth
V
OUT
= 0.5 V
PP
, A
V
= +1
V
OUT
= 0.5 V
PP
V
OUT
= 2 V
PP
V
OUT
= 2 V
PP
V
OUT
= 4 V
PP
, 40% to 60% (Note 5)
2V Step
650
450
400
200
3000
0.9
MHz
0.1 dB Gain Bandwidth
Slew Rate
Rise and Fall Time
(10% to 90%)
Settling Time to 0.1%
MHz
V/μs
ns
t
s
Distortion and Noise Response
HD2L
2
nd
Harmonic Distortion
HD2H
HD3L
3
rd
Harmonic Distortion
HD3H
IMD
Two-Tone Intermodulation
V
N
Output Noise Voltage
2V Step
10
ns
V
OUT
= 2.0 V
PP
, f = 10 MHz
V
OUT
= 2.0 V
PP
, f = 40 MHz
V
OUT
= 2.0 V
PP
, f = 10 MHz
V
OUT
= 2.0 V
PP
, f = 40 MHz
f = 10 MHz, P
OUT
= 10 dBm/tone
f = 100 kHz
62
52
78
65
65
10.5
9.3
10.5
3
dBc
dBc
dBc
A
V
= +2
A
V
= +1
A
V
= 1
nV/
I
NN
Non-Inverting Input Noise
Current
Differential Gain
Differential Phase
Static, DC Performance
A
V
Gain
pA/
DG
DP
R
L
= 150
, f = 4.43 MHz
R
L
= 150
, f = 4.43 MHz
.02
0.02
%
deg
1.98
1.96
1
2
2.00
2.02
2.04
+1
+2
±
7
±
8.3
V/V
Gain Error
%
V
IO
Input Offset Voltage
2
mV
DV
IO
Input Offset Voltage Average
Drift
Input Bias Current
35
μV/C
I
BN
Non-Inverting (Note 7)
5
±
15
±
18
±
22
±
31
μA
I
BI
Input Bias Current
Inverting
5
L
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