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參數(shù)資料
| 型號： | LMH6702WG-QMLV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 1 CHANNEL, VIDEO AMPLIFIER, CDSO10 |
| 封裝： | CERAMIC, SOIC-10 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 780K |
| 代理商： | LMH6702WG-QMLV |
Application Section (Continued)
DC ACCURACY AND NOISE
Example below shows the output offset computation equa-
tion for the non-inverting configuration using the typical bias
current and offset specifications for A
V =+2:
Output Offset : V
O =(±IBN RIN ± VIO)(1+RF/RG) ± IBI RF
Where R
IN is the equivalent input impedance on the non-
inverting input.
Example computation for A
V = +2, RF = 237
,R
IN =25
:
V
O =(±6A 25
± 1mV) (1 + 237/237) ± 8A 237 =
±4.20mV
A good design, however, should include a worst case calcu-
lation using Min/Max numbers in the data sheet tables, in
order to ensure "worst case" operation.
Further improvement in the output offset voltage and drift is
possible using the composite amplifiers described in Appli-
cation Note OA-7. The two input bias currents are physically
unrelated in both magnitude and polarity for the current
feedback topology. It is not possible, therefore, to cancel
their effects by matching the source impedance for the two
inputs (as is commonly done for matched input bias current
devices).
The total output noise is computed in a similar fashion to the
output offset voltage. Using the input noise voltage and the
two input noise currents, the output noise is developed
through the same gain equations for each term but com-
bined as the square root of the sum of squared contributing
elements. See Application Note OA-12 for a full discussion of
noise calculations for current feedback amplifiers.
PRINTED CIRCUIT LAYOUT
Generally, a good high frequency layout will keep power
supply and ground traces away from the inverting input and
output pins. Parasitic capacitances on these nodes to
ground will cause frequency response peaking and possible
circuit oscillations (see Application Note OA-15 for more
information). National Semiconductor suggests the following
evaluation boards as a guide for high frequency layout and
as an aid in device testing and characterization:
Device
Package
Evaluation Board
Part Number
LMH6702QMLMF SOT23-5
CLC730216
LMH6702QMLMA Plastic SOIC
CLC730227
These free evaluation boards are shipped when a device
sample request is placed with National Semiconductor.
LMH6702QML
www.national.com
10
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| 5962-0254601VZA | 1 CHANNEL, VIDEO AMPLIFIER, CDSO10 |
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| LMH6703MA | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMH6703MA/NOPB | 功能描述:運算放大器 - 運放 1.2Ghz Op-Amp RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMH6703MAX | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| LMH6703MAX/NOPB | 功能描述:運算放大器 - 運放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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