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參數(shù)資料
| 型號： | LMH6503MTX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Wideband, Low Power, Linear Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 1009K |
| 代理商： | LMH6503MTX |
Application Information
(Continued)
(5)
the minimum possible values that meet the input voltage and
maximum gain constraints. Scaling the resistor values will
decrease bandwidth and improve stability.
Figure 2
illustrates the resulting LMH6503 bandwidths as a
function of the maximum ( y axis) and minimum (related to x
axis) input voltages when V
OUT
is held constant at 1V
PP
.
ADJUSTING OFFSETS
Treating the offsets introduced by the input and output
stages of the LMH6503 is accomplished with a two step
process. The offset voltage of the output stage is treated by
first applying 1.1V on V
, which effectively isolates the
input stage and multiplier core from the output stage. As
illustrated in
Figure 3
, the trim pot located at R14 on the
LMH6503 Evaluation Board (CLC730033) should then be
adjusted in order to null the offset voltage seen at the
LMH6503’s output (pin 10).
Once this is accomplished, the offset errors introduced by
the input stage and multiplier core can then be treated. The
second step requires the absence of an input signal and
matched source impedances on the two input pins in order to
cancel the bias current errors. This done, then +1.1V should
be applied to V
G
and the trim pot located at R
10
adjusted in
order to null the offset voltage seen at the LMH6503’s output.
If a more limited gain range is anticipated, the above adjust-
ments should be made at these operating points. These
steps will minimize the output offset voltage. However, since
the offset term itself varies with the gain setting, the correc-
tion is not perfect and some residual output offset will re-
main.
GAIN ACCURACY
Defined as the ratio of measured gain (V/V), at a certain V
,
to the best fit line drawn through the typical gain (V/V)
distribution for 1V
<
V
<
1V (results expressed in dB)
(See
Figure 4
). The best fit gain (A
V
) is given by:
A
V
(V/V) = 4.87V
G
+ 4.61
For: 1V
≤
V
G
≤
+ 1V, R
F
= 1k
, R
G
= 174
For a V
range, the value specified in the tables represents
the worst case accuracy over the entire range. The "Typical"
value would be the worst case ratio between the "Typical
Gain" and the best fit line. The "Max" value would be the
worst case between the max/min gain limit and the best fit
line.
(6)
GAIN MATCHING
Defined as the limit on gain variation at a certain V
G
(ex-
pressed in dB) (See
Figure 4
). Specified as "Max" only (no
"Typical"). For a V
G
range, the value specified represents the
worst case matching over the entire range. The "Max" value
would be the worst case ratio between the max/min gain limit
and the typical gain.
20073902
FIGURE 2. Bandwidth vs. V
INMAX
and A
VMAX
20073954
FIGURE 3. Nulling the Output Offset Voltage
20073955
FIGURE 4. Gain Accuracy and Gain Matching
Parameters Defined
L
www.national.com
15
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LMH6503MTX/NOPB | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6504 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Wideband, Low Power, Variable Gain Amplifier |
| LMH6504MA | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6504MA/NOPB | 功能描述:特殊用途放大器 WB,Low Pwr,Variable Gain Amp RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
| LMH6504MAX | 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比（最小值）: 輸入補償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel |
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