參數(shù)資料
型號(hào): LMC835VX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻控制
英文描述: 1 CHANNEL(S), EQUALIZER CIRCUIT, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 12/18頁(yè)
文件大?。?/td> 474K
代理商: LMC835VX
Absolute Maximum Ratings
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
Supply Voltage VDDbVSS
18V
Allowable Input Voltage (Note 1)
VSSb03V
to VDDa03V
Storage Temperature Tstg
b
60 Cto a150 C
Lead Temperature (Soldering 10 sec) N Pkg
a
260 C
Lead Temperature V Pkg
Vapor Phase (60 sec)
a
215 C
Infrared (15 sec)
a
220 C
Operating Ratings
Supply Voltage VDDbVSS
5V to 16V
Digital Ground (Pin 13)
VSS to VDD
Digital Input (Pins 14 15 16)
VSS to VDD
Analog Input (Pins 1 2 3 4 25 26 27)
(Note 1)
VSS to VDD
Operating Temperature Topr
b
40 Cto a85 C
Electrical Characteristics (Note 2) VDDe75V VSSeb75V AGNDe0V
LOGIC SECTION
Tested
Design
Unit
Symbol
Parameter
Test Conditions
Typ
Limit
(Limit)
(Note 3)
(Note 4)
IDDL
Supply Current
Pins 14 15 16 are 0V
001
05
mA (Max)
ISSL
Pins 14 15 16 are 0V
001
05
mA (Max)
IDDH
Pins 14 15 16 are 5V
13
5
mA (Max)
ISSH
Pins 14 15 16 are 5V
09
5
mA (Max)
VIH
High-Level Input Voltage
Pins 14 15 16
18
23
25
V (Min)
VIL
Low-Level Input Voltage
Pins 14 15 16
09
06
04
V (Max)
fo
Clock Frequency
Pin 14
2000
500
kHz (Max)
tw(STB)
Width of STB Input
See
Figure 1
025
1
m
s (Min)
tsetup
Data Setup Time
See
Figure 1
025
1
m
s (Min)
thold
Data Hold Time
See
Figure 1
025
1
m
s (Min)
tcs
Delay from Rising Edge of CLOCK
See
Figure 1
025
1
m
s (Min)
to STB
IIN
Input Current
Pins 14 15 16 0VkVINk5V
g
001
g
1
m
A (Max)
CIN
Input Capacitance
Pins 14 15 16 fe1 MHz
5
pF
Note 1
Pins 2 3 and 26 have a maximum input voltage range of g22V for the typical application shown in
Figure 7
Note 2 Bold numbers
apply at temperature extremes All other numbers apply at TAe25 C VDDe75V VSSeb75VDGNDeAGNDe0V as shown in the test
circuit
Figures 3 and 4
Note 3
Guaranteed and 100% production tested
Note 4
Guaranteed (but not 100% production tested) over the operating temperature range These limits are not used to calculate outgoing quality levels
Timing Diagram
TLH6753 – 3
Note
To change the gain of the presently selected band it is not necessary to send DATA 1 (Band Selection) each time
FIGURE 1
3
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