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參數(shù)資料
| 型號： | LMC6681B1MX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Low Voltage, Rail-To-Rail Input and Output CMOS |
| 中文描述： | OP-AMP, 10000 uV OFFSET-MAX, 1.2 MHz BAND WIDTH, PDSO8 |
| 封裝： | SOP-8 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 750K |
| 代理商： | LMC6681B1MX |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V
+
V)
Current at Input Pin (Note 11)
Current at Output Pin (Note 3)
Current at Power Supply Pin
Lead Temp. (soldering, 10 sec.)
Storage Temperature Range
Junction Temperature (Note 4)
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
= 25C, V
+
= 3.0V, V = 0V, V
CM
= V
O
= V
+
/2, V
PD
= 0.6V and R
L
>
1 M
.
Boldface
limits apply at the temperature extremes (Note 16).
2 kV
±
Supply Voltage
(V
+
) +0.3V, (V) 0.3V
12V
±
5 mA
±
30 mA
35 mA
260C
65C to +150C
150C
Operating Ratings
(Note 1)
Supply Voltage
Junction Temperature Range
LMC6681AI, LMC6681BI
LMC6682AI, LMC6682BI
LMC6684AI, LMC6684BI
Thermal Resistance (
θ
JA
)
N Package, 8-pin Molded DIP
M Package, 8-pin Surface Mount
N Package, 14-pin Molded DIP
M Package, 14-pin Surface Mount
N Package, 16-pin Molded DIP
M Package, 16-pin Surface Mount
1.8V
≤
V
S
≤
10V
40C
≤
T
J
≤
+85C
40C
≤
T
J
≤
+85C
40C
≤
T
J
≤
+85C
108C/W
172C/W
88C/W
126C/W
83C/W
114C/W
Symbol
Parameter
Conditions
Typ
(Note 5)
LMC6681AI
LMC6682AI
LMC6684AI
Limit
(Note 6)
1
2.5
LMC6681BI
LMC6682BI
LMC6684BI
Limit
(Note 6)
3
4.5
Units
V
OS
Input Offset Voltage
0.5
mV
max
μV/C
TCV
OS
Input Offset Voltage
Average Drift
Input Current
Input Offset Current
Input Resistance
Input Capacitance
Common Mode
Rejection Ratio
Power Supply
Rejection Ratio
Input Common Mode
Voltage Range
1.5
I
B
I
OS
R
IN
C
IN
CMRR
(Note 12)
(Note 12)
0.08
0.04
>
1
3
82
20
10
20
10
pA max
pA max
Tera
pF
dB
min
dB
min
V
min
V
max
V/mV
V/mV
V
min
V
max
V
min
V
max
V
min
V
max
(Note 13)
70
65
70
65
3.18
3.00
0.18
0.00
10
12
2.70
2.58
0.3
0.42
2.85
2.79
0.15
0.21
2.94
2.91
0.04
0.05
65
62
65
62
3.18
3.00
0.18
0.00
10
12
2.70
2.58
0.3
0.42
2.85
2.79
0.15
0.21
2.94
2.91
0.04
0.05
PSRR
±
1.5V
≤
V
S
≤
±
2.5V
V
O
= V
+
/2 = V
CM
CMRR
>
50 dB
82
V
CM
3.23
0.3
A
V
Large Signal
Voltage Gain
R
L
= 600
(Notes 7, 12)
R
L
= 10 k
(Notes 7, 12)
R
L
= 600
to V
+
/2
70
1000
2.87
V
O
Output Swing
0.15
R
L
= 2 k
to V
+
/2
2.95
0.05
R
L
= 10 k
to V
+
/2
2.99
0.01
www.national.com
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