參數(shù)資料
型號: LMC6681
廠商: National Semiconductor Corporation
英文描述: Low Voltage, Rail-To-Rail Input and Output CMOS
中文描述: 低電壓軌至軌輸入和輸出的CMOS
文件頁數(shù): 16/24頁
文件大?。?/td> 750K
代理商: LMC6681
5.0 Printed-Circuit-Board Layout
for High-Impedance Work
(Continued)
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an in-
sulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
13
6.0 Powerdown
6.1 PINOUT FOR THE LMC6681/LMC6682/LMC6684
For the LMC6681/2/4, the input, output, and power pins are
the same as those used in the standard configuration. One
of the other pins, pin 5 in the case of the LMC6681, is used
to enable the powerdown mode. The connection diagrams
for the LMC6681/2/4 are on the front page of the datasheet.
The LMC6684 has 2 powerdown options. Each of the power-
down pins disables two amplifiers. If both the powerdown
pins are pulled high, all four amplifiers will be disabled. Re-
ferring to the connection diagrams on the front page of the
datasheet, Pin 5 disables amplifiers B and C and Pin 13 dis-
ables amplifiers A and D.
6.2 EXPLANATION OF DATASHEET PARAMETERS
The LMC6681/2/4 is ON (meets all the datasheet specs)
when the voltage applied to the powerdown pin, V
is a
logic low. The device is OFF when V
is a logic high. These
logic levels are indicated in the test conditions in the
datasheet tables. Summarizing these numbers:
Supply
Voltage
2.2V
3V
5V
10V
In applications where the powerdown pin is not connected
externally, it is pulled to a logic low internally through a cur-
rent source. The t
and t
specs will essentially be the
same for a V
in the specified range. This means that the
LMC6681/2/4 will typically be fully operational 50 μs after a
logic low has been applied to the powerdown pin. Please
note that the frequency of V
PD
in the test circuit below is
5 Hz.
Logic High [V]
at room
V
PD
1.5
V
PD
2.3
V
PD
4.3
V
PD
9.3
Logic Low [V]
at room
V
PD
0.4
V
PD
0.6
V
PD
0.9
V
PD
1.2
over temp
V
PD
1.65
V
PD
2.45
V
PD
4.45
V
PD
9.45
over temp
V
PD
0.25
V
PD
0.45
V
PD
0.75
V
PD
1.05
DS012042-19
Inverting Amplifier
DS012042-20
Non-Inverting Amplifier
DS012042-21
Follower
FIGURE 12. Typical Connections of Guard Rings
DS012042-22
(Input pins are lifted out of PC board and soldered directly to components.
FIGURE 13. Air Wiring
www.national.com
16
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