參數(shù)資料
型號: LMC6584BIMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運動控制電子
英文描述: Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier
中文描述: QUAD OP-AMP, 3000 uV OFFSET-MAX, 1.2 MHz BAND WIDTH, PDSO14
封裝: SOP-14
文件頁數(shù): 11/19頁
文件大?。?/td> 678K
代理商: LMC6584BIMX
3.0 Low Voltage Operation
(Continued)
Battery Type
Nominal Voltage
End of Discharge
Voltage
1V
1V
1.8V
1.3V
1.1V
1.7V–2.4V
NiMH
NiCd
Lead-Acid
Silver Oxide
Carbon-Zinc
Lithium
At V
= 2.2V, the LMC6582/4 has a rail-to-rail input
common-mode voltage range. Figure 4 shows an input volt-
age extending to both supplies and the resulting output.
1.2V
1.2V
2V
1.6V
1.5V
2.6V–3.6V
The amplifier is operational at V
=1.8V, with guaranteed in-
put common-mode voltage range, output swing, and CMRR
specs. Figure 5shows the response of the LMC6582/4 at V
S
= 1.8V.
Figure 6 shows an input voltage exceeding both supplies
with no resulting phase inversion on the output.
4.0 Capacitive Load Tolerance
The LMC6582/4 can typically drive a 100 pF load with V
=
10V at unity gain without oscillating. The unity gain follower
is the most sensitive configuration to capacitive load. Direct
capacitive loading reduces the phase margin of op-amps.
The combination of the op-amp’s output impedance and the
capacitive load induces phase lag. This results in either an
underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 7 If there is a resistive
component of the load in parallel to the capacitive compo-
nent, the isolation resistor and the resistive load create a
voltage divider at the output. This introduces a DC error at
the output.
Figure 8 displays the pulse response of the LMC6582 circuit
in Figure 7
DS012041-6
FIGURE 4. The Input Common-Mode Voltage
Range Extends to Both Supplies at V
S
= 2.2V
DS012041-7
FIGURE 5. Response of the LMC6582/4
at V
S
= 1.8V
DS012041-8
FIGURE 6. An Input Voltage Signal Exceeds
LMC6582/4 Power Supply Voltages of
V
S
= 1.8V with No Output Phase Inversion
DS012041-9
FIGURE 7. Resistive Isolation of a 350 pF Capacitive
Load
DS012041-10
FIGURE 8. Pulse Response of the
LMC6582 Circuit in
Figure 7
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